From patchwork Mon Jun 30 15:34:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mihai Caraman X-Patchwork-Id: 365660 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5AF55140110 for ; Tue, 1 Jul 2014 01:36:51 +1000 (EST) Received: from ozlabs.org (ozlabs.org [103.22.144.67]) by lists.ozlabs.org (Postfix) with ESMTP id 3F0051A0870 for ; Tue, 1 Jul 2014 01:36:51 +1000 (EST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1blp0189.outbound.protection.outlook.com [207.46.163.189]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id B3D131A001A for ; Tue, 1 Jul 2014 01:35:13 +1000 (EST) Received: from BY2PR03CA040.namprd03.prod.outlook.com (10.141.249.13) by BL2PR03MB499.namprd03.prod.outlook.com (10.141.93.147) with Microsoft SMTP Server (TLS) id 15.0.974.11; Mon, 30 Jun 2014 15:35:06 +0000 Received: from BY2FFO11FD051.protection.gbl (2a01:111:f400:7c0c::131) by BY2PR03CA040.outlook.office365.com (2a01:111:e400:2c5d::13) with Microsoft SMTP Server (TLS) id 15.0.974.11 via Frontend Transport; Mon, 30 Jun 2014 15:35:05 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD051.mail.protection.outlook.com (10.1.15.188) with Microsoft SMTP Server (TLS) id 15.0.969.12 via Frontend Transport; Mon, 30 Jun 2014 15:35:05 +0000 Received: from fsr-fed1764-012.ea.freescale.net (fsr-fed1764-012-010171073213.ea.freescale.net [10.171.73.213]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s5UFZ0Nf029673; Mon, 30 Jun 2014 08:35:04 -0700 From: Mihai Caraman To: Subject: [PATCH 2/6 v2] KVM: PPC: Book3E: Refactor SPE/FP exit handling Date: Mon, 30 Jun 2014 18:34:53 +0300 Message-ID: <1404142497-6430-3-git-send-email-mihai.caraman@freescale.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1404142497-6430-1-git-send-email-mihai.caraman@freescale.com> References: <1404142497-6430-1-git-send-email-mihai.caraman@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(69596002)(83322001)(84676001)(21056001)(105606002)(106466001)(68736004)(20776003)(64706001)(47776003)(80022001)(102836001)(19580405001)(107046002)(2351001)(19580395003)(76482001)(62966002)(6806004)(92726001)(81156004)(81342001)(81542001)(44976005)(31966008)(88136002)(89996001)(87936001)(36756003)(77156001)(86362001)(93916002)(48376002)(97736001)(50226001)(79102001)(85306003)(104166001)(87286001)(74662001)(77982001)(46102001)(26826002)(4396001)(33646001)(83072002)(76176999)(50466002)(85852003)(74502001)(104016002)(92566001)(229853001)(50986999)(99396002)(95666004)(32563001); DIR:OUT; SFP:; SCL:1; SRVR:BL2PR03MB499; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0258E7CCD4 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=mihai.caraman@freescale.com; X-OriginatorOrg: freescale.com Cc: Mihai Caraman , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" SPE/FP/AltiVec interrupts share the same numbers. Refactor SPE/FP exit handling to accommodate AltiVec later on the same flow. Add kvmppc_supports_spe() to detect suport for the unit at runtime since it can be configured in the kernel but not featured on hardware and vice versa. Signed-off-by: Mihai Caraman --- v2: - enable SPE only if !HV && SPE arch/powerpc/kvm/booke.c | 93 +++++++++++++++++++++++++++++++----------------- 1 file changed, 60 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index 3c86d9b..80cd8df 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c @@ -91,6 +91,15 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) } } +static inline bool kvmppc_supports_spe(void) +{ +#ifdef CONFIG_SPE + if (cpu_has_feature(CPU_FTR_SPE)) + return true; +#endif + return false; +} + #ifdef CONFIG_SPE void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) { @@ -976,49 +985,67 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, r = RESUME_GUEST; break; -#ifdef CONFIG_SPE case BOOKE_INTERRUPT_SPE_ALTIVEC_UNAVAIL: { - if (vcpu->arch.shared->msr & MSR_SPE) - kvmppc_vcpu_enable_spe(vcpu); - else - kvmppc_booke_queue_irqprio(vcpu, - BOOKE_IRQPRIO_SPE_ALTIVEC_UNAVAIL); + if (kvmppc_supports_spe()) { + bool enabled = false; + +#if !defined(CONFIG_KVM_BOOKE_HV) && defined(CONFIG_SPE) + if (vcpu->arch.shared->msr & MSR_SPE) { + kvmppc_vcpu_enable_spe(vcpu); + enabled = true; + } +#endif + if (!enabled) + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_ALTIVEC_UNAVAIL); + } else { + /* + * Guest wants SPE, but host kernel doesn't support it. + * Send an "unimplemented operation" program check to + * the guest. + */ + kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); + } + r = RESUME_GUEST; break; } case BOOKE_INTERRUPT_SPE_FP_DATA_ALTIVEC_ASSIST: - kvmppc_booke_queue_irqprio(vcpu, - BOOKE_IRQPRIO_SPE_FP_DATA_ALTIVEC_ASSIST); - r = RESUME_GUEST; - break; - - case BOOKE_INTERRUPT_SPE_FP_ROUND: - kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); - r = RESUME_GUEST; - break; -#else - case BOOKE_INTERRUPT_SPE_ALTIVEC_UNAVAIL: - /* - * Guest wants SPE, but host kernel doesn't support it. Send - * an "unimplemented operation" program check to the guest. - */ - kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); - r = RESUME_GUEST; + if (kvmppc_supports_spe()) { + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_FP_DATA_ALTIVEC_ASSIST); + r = RESUME_GUEST; + } else { + /* + * These really should never happen without CONFIG_SPE, + * as we should never enable the real MSR[SPE] in the + * guest. + */ + pr_crit("%s: unexpected SPE interrupt %u at %08lx\n", + __func__, exit_nr, vcpu->arch.pc); + run->hw.hardware_exit_reason = exit_nr; + r = RESUME_HOST; + } break; - /* - * These really should never happen without CONFIG_SPE, - * as we should never enable the real MSR[SPE] in the guest. - */ - case BOOKE_INTERRUPT_SPE_FP_DATA_ALTIVEC_ASSIST: case BOOKE_INTERRUPT_SPE_FP_ROUND: - printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", - __func__, exit_nr, vcpu->arch.pc); - run->hw.hardware_exit_reason = exit_nr; - r = RESUME_HOST; + if (kvmppc_supports_spe()) { + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_FP_ROUND); + r = RESUME_GUEST; + } else { + /* + * These really should never happen without CONFIG_SPE, + * as we should never enable the real MSR[SPE] in the + * guest. + */ + pr_crit("%s: unexpected SPE interrupt %u at %08lx\n", + __func__, exit_nr, vcpu->arch.pc); + run->hw.hardware_exit_reason = exit_nr; + r = RESUME_HOST; + } break; -#endif case BOOKE_INTERRUPT_DATA_STORAGE: kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,