From patchwork Tue Apr 1 09:10:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Qiang X-Patchwork-Id: 335719 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 0846D14013C for ; Tue, 1 Apr 2014 20:13:28 +1100 (EST) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe002.messaging.microsoft.com [216.32.181.182]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CEAFF140080 for ; Tue, 1 Apr 2014 20:12:55 +1100 (EST) Received: from mail232-ch1-R.bigfish.com (10.43.68.241) by CH1EHSOBE010.bigfish.com (10.43.70.60) with Microsoft SMTP Server id 14.1.225.22; Tue, 1 Apr 2014 09:12:50 +0000 Received: from mail232-ch1 (localhost [127.0.0.1]) by mail232-ch1-R.bigfish.com (Postfix) with ESMTP id 67FFB1AE013A; Tue, 1 Apr 2014 09:12:50 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6h1082kzdchz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h2516h2545h255eh25cch25f6h2605h268bh1155h) Received: from mail232-ch1 (localhost.localdomain [127.0.0.1]) by mail232-ch1 (MessageSwitch) id 1396343568539389_14068; Tue, 1 Apr 2014 09:12:48 +0000 (UTC) Received: from CH1EHSMHS043.bigfish.com (snatpool3.int.messaging.microsoft.com [10.43.68.228]) by mail232-ch1.bigfish.com (Postfix) with ESMTP id 7D3F11E80047; Tue, 1 Apr 2014 09:12:48 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS043.bigfish.com (10.43.69.252) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 1 Apr 2014 09:12:48 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.3.158.2; Tue, 1 Apr 2014 09:12:47 +0000 Received: from titan.am.freescale.net (b45104-01-010192208233.ap.freescale.net [10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s319CgUM027744; Tue, 1 Apr 2014 02:12:44 -0700 From: Zhao Qiang To: , , , , Subject: [PATCH v2] spi: add "spi-lsb-first" to devicetree Date: Tue, 1 Apr 2014 17:10:50 +0800 Message-ID: <1396343450-6199-1-git-send-email-B45475@freescale.com> X-Mailer: git-send-email 1.8.5 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Cc: Zhao Qiang , baruch@tkos.co.il, R63061@freescale.com, wangyuhang2014@gmail.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" add optional property devicetree for SPI slave nodes into devicetree so that LSB mode can be enabled by devicetree. Signed-off-by: Zhao Qiang --- changs for v2: - remove duplicate "spi-rx-bus-width" Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++ drivers/spi/spi.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index e5a4d1b..22d5740 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,8 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-lsb-first - (optional) Empty property indicating device requires + LSB first mode. - spi-tx-bus-width - (optional) The bus width(number of data wires) that used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - (optional) The bus width(number of data wires) that diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 23756b0..0a20a90 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1050,6 +1050,8 @@ static void of_register_spi_devices(struct spi_master *master) spi->mode |= SPI_CS_HIGH; if (of_find_property(nc, "spi-3wire", NULL)) spi->mode |= SPI_3WIRE; + if (of_find_property(nc, "spi-lsb-first", NULL)) + spi->mode |= SPI_LSB_FIRST; /* Device DUAL/QUAD mode */ if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {