From patchwork Wed Feb 19 12:41:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: harninder rai X-Patchwork-Id: 321885 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id DC0AE2C03A0 for ; Wed, 19 Feb 2014 23:42:13 +1100 (EST) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe005.messaging.microsoft.com [65.55.88.15]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A54E42C00C7 for ; Wed, 19 Feb 2014 23:41:40 +1100 (EST) Received: from mail185-tx2-R.bigfish.com (10.9.14.238) by TX2EHSOBE002.bigfish.com (10.9.40.22) with Microsoft SMTP Server id 14.1.225.22; Wed, 19 Feb 2014 12:41:35 +0000 Received: from mail185-tx2 (localhost [127.0.0.1]) by mail185-tx2-R.bigfish.com (Postfix) with ESMTP id 128C2260086; Wed, 19 Feb 2014 12:41:35 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 1 X-BigFish: VS1(zzzz1f42h2148h208ch1ee6h1de0h1fdah21bdh2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh87h2a8h839hd24he5bhf0ah107ah11b5h121eh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14afh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1e1dh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h2516h2545h255eh2388i1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail185-tx2 (localhost.localdomain [127.0.0.1]) by mail185-tx2 (MessageSwitch) id 1392813692427764_2180; Wed, 19 Feb 2014 12:41:32 +0000 (UTC) Received: from TX2EHSMHS021.bigfish.com (unknown [10.9.14.251]) by mail185-tx2.bigfish.com (Postfix) with ESMTP id 5FE272C0041; Wed, 19 Feb 2014 12:41:32 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS021.bigfish.com (10.9.99.121) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 19 Feb 2014 12:41:31 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 19 Feb 2014 12:41:30 +0000 Received: from nmglablinux22.freescale.com (nmglablinux22.zin33.ap.freescale.net [10.232.20.244]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s1JCfTE7005899; Wed, 19 Feb 2014 05:41:30 -0700 Received: by nmglablinux22.freescale.com (Postfix, from userid 4537) id 5CBED5DC8B; Wed, 19 Feb 2014 18:11:28 +0530 (IST) From: Harninder Rai To: , Subject: [PATCH][v3] powerpc/fsl: Add/update miscellaneous missing binding Date: Wed, 19 Feb 2014 18:11:26 +0530 Message-ID: <1392813686-10249-1-git-send-email-harninder.rai@freescale.com> X-Mailer: git-send-email 1.7.6.GIT MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Cc: Harninder Rai , linuxppc-dev@lists.ozlabs.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Missing bindings were found on running checkpatch.pl on bsc9132 device tree. This patch add/update the following - Add bindings for L2 cache controller - Add bindings for memory controller - Update bindings for USB controller Signed-off-by: Harninder Rai --- * Changes in v3: Incorporated Scott's comments - Move cache-line-size property under required properties - Update compatible for mem-ctrl to reflect "fsl,qoriq-memory-controller" - One minor * Changes since base version: Incorporated Scott's comments - Rename l2cc.txt to l2cache.txt - Add information about ePAPR compliance - Add missing "cache" in compatible - Miscellaneous minors .../devicetree/bindings/powerpc/fsl/l2cache.txt | 23 +++++++++++++++++ .../devicetree/bindings/powerpc/fsl/mem-ctrlr.txt | 27 ++++++++++++++++++++ Documentation/devicetree/bindings/usb/fsl-usb.txt | 4 ++- 3 files changed, 53 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mem-ctrlr.txt diff --git a/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt b/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt new file mode 100644 index 0000000..c41b218 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt @@ -0,0 +1,23 @@ +Freescale L2 Cache Controller + +L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms. +The cache bindings explained below are ePAPR compliant + +Required Properties: + +- compatible : Should include "fsl,chip-l2-cache-controller" and "cache" + where chip is the processor (bsc9132, npc8572 etc.) +- reg : Address and size of L2 cache controller registers +- cache-size : Size of the entire L2 cache +- interrupts : Error interrupt of L2 controller +- cache-line-size : Size of L2 cache lines + +Example: + + L2: l2-cache-controller@20000 { + compatible = "fsl,bsc9132-l2-cache-controller", "cache"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2,256K + interrupts = <16 2 1 0>; + }; diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mem-ctrlr.txt b/Documentation/devicetree/bindings/powerpc/fsl/mem-ctrlr.txt new file mode 100644 index 0000000..f87856f --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/mem-ctrlr.txt @@ -0,0 +1,27 @@ +Freescale DDR memory controller + +Properties: + +- compatible : Should include "fsl,chip-memory-controller" where + chip is the processor (bsc9132, mpc8572 etc.), or + "fsl,qoriq-memory-controller". +- reg : Address and size of DDR controller registers +- interrupts : Error interrupt of DDR controller + +Example 1: + + memory-controller@2000 { + compatible = "fsl,bsc9132-memory-controller"; + reg = <0x2000 0x1000>; + interrupts = <16 2 1 8>; + }; + + +Example 2: + + ddr1: memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.7", + "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; diff --git a/Documentation/devicetree/bindings/usb/fsl-usb.txt b/Documentation/devicetree/bindings/usb/fsl-usb.txt index bd5723f..4779c02 100644 --- a/Documentation/devicetree/bindings/usb/fsl-usb.txt +++ b/Documentation/devicetree/bindings/usb/fsl-usb.txt @@ -8,7 +8,9 @@ and additions : Required properties : - compatible : Should be "fsl-usb2-mph" for multi port host USB controllers, or "fsl-usb2-dr" for dual role USB controllers - or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121 + or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121. + Wherever applicable, the IP version of the USB controller should + also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132). - phy_type : For multi port host USB controllers, should be one of "ulpi", or "serial". For dual role USB controllers, should be one of "ulpi", "utmi", "utmi_wide", or "serial".