From patchwork Wed Jul 3 12:42:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mihai Caraman X-Patchwork-Id: 256618 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id E59F92C0422 for ; Wed, 3 Jul 2013 22:45:22 +1000 (EST) Received: from co1outboundpool.messaging.microsoft.com (co1ehsobe005.messaging.microsoft.com [216.32.180.188]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id AC0E52C0357 for ; Wed, 3 Jul 2013 22:43:46 +1000 (EST) Received: from mail45-co1-R.bigfish.com (10.243.78.246) by CO1EHSOBE020.bigfish.com (10.243.66.83) with Microsoft SMTP Server id 14.1.225.23; Wed, 3 Jul 2013 12:43:42 +0000 Received: from mail45-co1 (localhost [127.0.0.1]) by mail45-co1-R.bigfish.com (Postfix) with ESMTP id 4825328047C; Wed, 3 Jul 2013 12:43:42 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zcb8kzzz1f42h1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dfeh1dffh1e23h1155h) Received: from mail45-co1 (localhost.localdomain [127.0.0.1]) by mail45-co1 (MessageSwitch) id 1372855383437835_11094; Wed, 3 Jul 2013 12:43:03 +0000 (UTC) Received: from CO1EHSMHS007.bigfish.com (unknown [10.243.78.228]) by mail45-co1.bigfish.com (Postfix) with ESMTP id 5F0A3E00D7; Wed, 3 Jul 2013 12:43:03 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS007.bigfish.com (10.243.66.17) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 3 Jul 2013 12:43:03 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.328.11; Wed, 3 Jul 2013 12:43:02 +0000 Received: from fsr-fed1364-13.ea.freescale.net (fsr-fed1364-13.ea.freescale.net [10.171.81.124]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r63CgvO2012922; Wed, 3 Jul 2013 05:43:01 -0700 From: Mihai Caraman To: Subject: [PATCH 2/6] KVM: PPC: Book3E: Refactor SPE/FP exit handling Date: Wed, 3 Jul 2013 15:42:35 +0300 Message-ID: <1372855359-13452-3-git-send-email-mihai.caraman@freescale.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1372855359-13452-1-git-send-email-mihai.caraman@freescale.com> References: <1372855359-13452-1-git-send-email-mihai.caraman@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Mihai Caraman , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" SPE/FP/AltiVec interrupts share the same numbers. Refactor SPE/FP exit handling to accommodate AltiVec later. Detect the targeted unit at run time since it can be configured in the kernel but not featured on hardware. Signed-off-by: Mihai Caraman --- arch/powerpc/kvm/booke.c | 102 +++++++++++++++++++++++++++++++--------------- arch/powerpc/kvm/booke.h | 1 + 2 files changed, 70 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index fb47e85..113961f 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c @@ -89,6 +89,15 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) } } +static inline bool kvmppc_supports_spe(void) +{ +#ifdef CONFIG_SPE + if (cpu_has_feature(CPU_FTR_SPE)) + return true; +#endif + return false; +} + #ifdef CONFIG_SPE void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) { @@ -99,7 +108,7 @@ void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) preempt_enable(); } -static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) +void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) { preempt_disable(); enable_kernel_spe(); @@ -118,6 +127,14 @@ static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) } } #else +void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) +{ +} + +void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) +{ +} + static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) { } @@ -943,48 +960,67 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, r = RESUME_GUEST; break; -#ifdef CONFIG_SPE case BOOKE_INTERRUPT_SPE_ALTIVEC_UNAVAIL: { - if (vcpu->arch.shared->msr & MSR_SPE) - kvmppc_vcpu_enable_spe(vcpu); - else - kvmppc_booke_queue_irqprio(vcpu, - BOOKE_IRQPRIO_SPE_ALTIVEC_UNAVAIL); + if (kvmppc_supports_spe()) { + bool enabled = false; + +#ifndef CONFIG_KVM_BOOKE_HV + if (vcpu->arch.shared->msr & MSR_SPE) { + kvmppc_vcpu_enable_spe(vcpu); + enabled = true; + } +#endif + if (!enabled) + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_ALTIVEC_UNAVAIL); + } else { + /* + * Guest wants SPE, but host kernel doesn't support it. + * Send an "unimplemented operation" program check to + * the guest. + */ + kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); + } + r = RESUME_GUEST; break; } case BOOKE_INTERRUPT_SPE_FP_DATA_ALTIVEC_ASSIST: - kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA_ALTIVEC_ASSIST); - r = RESUME_GUEST; - break; - - case BOOKE_INTERRUPT_SPE_FP_ROUND: - kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); - r = RESUME_GUEST; - break; -#else - case BOOKE_INTERRUPT_SPE_ALTIVEC_UNAVAIL: - /* - * Guest wants SPE, but host kernel doesn't support it. Send - * an "unimplemented operation" program check to the guest. - */ - kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); - r = RESUME_GUEST; + if (kvmppc_supports_spe()) { + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_FP_DATA_ALTIVEC_ASSIST); + r = RESUME_GUEST; + } else { + /* + * These really should never happen without CONFIG_SPE, + * as we should never enable the real MSR[SPE] in the + * guest. + */ + printk(KERN_CRIT "%s: unexpected SPE interrupt %u at \ + %08lx\n", __func__, exit_nr, vcpu->arch.pc); + run->hw.hardware_exit_reason = exit_nr; + r = RESUME_HOST; + } break; - /* - * These really should never happen without CONFIG_SPE, - * as we should never enable the real MSR[SPE] in the guest. - */ - case BOOKE_INTERRUPT_SPE_FP_DATA_ALTIVEC_ASSIST: case BOOKE_INTERRUPT_SPE_FP_ROUND: - printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", - __func__, exit_nr, vcpu->arch.pc); - run->hw.hardware_exit_reason = exit_nr; - r = RESUME_HOST; + if (kvmppc_supports_spe()) { + kvmppc_booke_queue_irqprio(vcpu, + BOOKE_IRQPRIO_SPE_FP_ROUND); + r = RESUME_GUEST; + } else { + /* + * These really should never happen without CONFIG_SPE, + * as we should never enable the real MSR[SPE] in the + * guest. + */ + printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", + __func__, exit_nr, vcpu->arch.pc); + run->hw.hardware_exit_reason = exit_nr; + r = RESUME_HOST; + } break; -#endif case BOOKE_INTERRUPT_DATA_STORAGE: kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h index 9e92006..e92ce5b 100644 --- a/arch/powerpc/kvm/booke.h +++ b/arch/powerpc/kvm/booke.h @@ -85,6 +85,7 @@ void kvmppc_load_guest_spe(struct kvm_vcpu *vcpu); void kvmppc_save_guest_spe(struct kvm_vcpu *vcpu); /* high-level function, manages flags, host state */ +void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu); void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu); void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu);