From patchwork Mon Nov 5 11:19:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varun Sethi X-Patchwork-Id: 197191 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id B8C442C0699 for ; Mon, 5 Nov 2012 22:22:55 +1100 (EST) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe005.messaging.microsoft.com [65.55.88.15]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id BB9A92C0342 for ; Mon, 5 Nov 2012 22:20:14 +1100 (EST) Received: from mail163-tx2-R.bigfish.com (10.9.14.254) by TX2EHSOBE009.bigfish.com (10.9.40.29) with Microsoft SMTP Server id 14.1.225.23; Mon, 5 Nov 2012 11:20:09 +0000 Received: from mail163-tx2 (localhost [127.0.0.1]) by mail163-tx2-R.bigfish.com (Postfix) with ESMTP id 91FBE1E01CC; Mon, 5 Nov 2012 11:20:09 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzd799hzz1de0h1202h1d1ah1d2ahzz8275bhz2dh87h2a8h668h839he5bhf0ah107ah11b5h121eh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14afh1504h1537h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail163-tx2 (localhost.localdomain [127.0.0.1]) by mail163-tx2 (MessageSwitch) id 1352114393122657_26566; Mon, 5 Nov 2012 11:19:53 +0000 (UTC) Received: from TX2EHSMHS041.bigfish.com (unknown [10.9.14.240]) by mail163-tx2.bigfish.com (Postfix) with ESMTP id 115B622004D; Mon, 5 Nov 2012 11:19:53 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS041.bigfish.com (10.9.99.141) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 5 Nov 2012 11:19:50 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.318.3; Mon, 5 Nov 2012 11:19:50 +0000 Received: from nmglablinux19.freescale.com (nmglablinux19.zin33.ap.freescale.net [10.232.20.241]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id qA5BJkq7002856; Mon, 5 Nov 2012 04:19:47 -0700 Received: by nmglablinux19.freescale.com (Postfix, from userid 5036) id C0C9068097; Mon, 5 Nov 2012 16:49:45 +0530 (IST) From: Varun Sethi To: , , , , , Subject: [PATCH 3/4 v4] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver. Date: Mon, 5 Nov 2012 16:49:20 +0530 Message-ID: <1352114361-25192-3-git-send-email-Varun.Sethi@freescale.com> X-Mailer: git-send-email 1.6.5.6 In-Reply-To: <1352114361-25192-2-git-send-email-Varun.Sethi@freescale.com> References: <1352114361-25192-1-git-send-email-Varun.Sethi@freescale.com> <1352114361-25192-2-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com Cc: Varun Sethi X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Added the following domain attributes required by FSL PAMU driver: 1. Subwindows field added to the iommu domain geometry attribute. 2. Added new iommu stash attribute, which allows setting of the LIODN specific stash id parameter through IOMMU API. 3. Added an attribute for enabling/disabling DMA to a particular memory window. Signed-off-by: Varun Sethi --- changes in v4: - Updated comment explaining subwindows(as mentioned by Scott). change in v3: -renamed the stash attribute targets include/linux/iommu.h | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index f3b99e1..e72f5e5 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -44,6 +44,34 @@ struct iommu_domain_geometry { dma_addr_t aperture_start; /* First address that can be mapped */ dma_addr_t aperture_end; /* Last address that can be mapped */ bool force_aperture; /* DMA only allowed in mappable range? */ + + /** + * There could be a single contiguous window tha maps the entire + * geometry or it could be split in to multiple subwindows. + * Subwindows allow for supporting physically discontiguous mappings. + * This attribute indicates number of DMA subwindows supported by + * the geometry. If there is a single window that maps the entire + * geometry, attribute must be set to "1". A value of "0" implies + * that there are 256 subwindows each of size 4K. Value other than + * "0" or "1" indicates the actual number of subwindows. + */ + u32 subwindows; +}; + +/* cache stash targets */ +#define IOMMU_ATTR_CACHE_L1 1 +#define IOMMU_ATTR_CACHE_L2 2 +#define IOMMU_ATTR_CACHE_L3 3 + +/* This attribute corresponds to IOMMUs capable of generating + * a stash transaction. A stash transaction is typically a + * hardware initiated prefetch of data from memory to cache. + * This attribute allows configuring stashig specific parameters + * in the IOMMU hardware. + */ +struct iommu_stash_attribute { + u32 cpu; /* cpu number */ + u32 cache; /* cache to stash to: L1,L2,L3 */ }; struct iommu_domain { @@ -60,6 +88,14 @@ struct iommu_domain { enum iommu_attr { DOMAIN_ATTR_MAX, DOMAIN_ATTR_GEOMETRY, + /* Set the IOMMU hardware stashing + * parameters. + */ + DOMAIN_ATTR_STASH, + /* Explicity enable/disable DMA for a + * particular memory window. + */ + DOMAIN_ATTR_ENABLE, }; #ifdef CONFIG_IOMMU_API