From patchwork Sun Apr 1 06:56:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongtao Jia X-Patchwork-Id: 149905 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 7A196B76DF for ; Sun, 1 Apr 2012 17:14:00 +1000 (EST) Received: from am1outboundpool.messaging.microsoft.com (am1ehsobe006.messaging.microsoft.com [213.199.154.209]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 002B6B710A; Sun, 1 Apr 2012 17:09:05 +1000 (EST) Received: from mail53-am1-R.bigfish.com (10.3.201.241) by AM1EHSOBE001.bigfish.com (10.3.204.21) with Microsoft SMTP Server id 14.1.225.23; Sun, 1 Apr 2012 07:08:59 +0000 Received: from mail53-am1 (localhost [127.0.0.1]) by mail53-am1-R.bigfish.com (Postfix) with ESMTP id 577614003C1; Sun, 1 Apr 2012 07:08:59 +0000 (UTC) X-SpamScore: 3 X-BigFish: VS3(z37d5kzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail53-am1 (localhost.localdomain [127.0.0.1]) by mail53-am1 (MessageSwitch) id 1333264137402998_12713; Sun, 1 Apr 2012 07:08:57 +0000 (UTC) Received: from AM1EHSMHS019.bigfish.com (unknown [10.3.201.254]) by mail53-am1.bigfish.com (Postfix) with ESMTP id 5DF0E360171; Sun, 1 Apr 2012 07:08:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS019.bigfish.com (10.3.206.22) with Microsoft SMTP Server (TLS) id 14.1.225.23; Sun, 1 Apr 2012 07:08:57 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.1.355.3; Sun, 1 Apr 2012 02:08:54 -0500 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q3178pSG025179; Sun, 1 Apr 2012 00:08:52 -0700 From: Jia Hongtao To: Subject: [RFC] powerpc/fsl-pci: Document the "fsl, has-isa" property for Freescale PCI Date: Sun, 1 Apr 2012 14:56:36 +0800 Message-ID: <1333263396-23932-1-git-send-email-B38951@freescale.com> X-Mailer: git-send-email 1.7.5.1 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: devicetree-discuss@lists.ozlabs.org, b38951@freescale.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org If PCI is primary bus we should set isa_io/mem_base when parsing PCI bridge resources from device tree. The previous way to check the primary bus based on a hard-coded address named primary_phb_addr. Now we add a property named "fsl,has-isa" into device tree. In kernel we use this property to find out the bus is primary or not. This way is more flexible. Signed-off-by: Jia Hongtao Signed-off-by: Li Yang --- .../devicetree/bindings/powerpc/fsl/pci.txt | 36 ++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pci.txt diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pci.txt b/Documentation/devicetree/bindings/powerpc/fsl/pci.txt new file mode 100644 index 0000000..7b18090 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/pci.txt @@ -0,0 +1,36 @@ +* Freescale PCI + +Freescale PCI specific property: +- fsl,has-isa : If PCI is primary bus we should set isa_io/mem_base when + parsing PCI bridge resources. This property is an indicator + to inform kernel the PCI is primary. + +Example (MPC8572DS) + &pci0 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 255>; + clock-frequency = <33333333>; + interrupts = <24 2 0 0>; + fsl,has-isa; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <24 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 + >; + }; + };