From patchwork Thu Dec 15 11:00:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiejun Chen X-Patchwork-Id: 131563 X-Patchwork-Delegate: benh@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 769FC100E26 for ; Thu, 15 Dec 2011 22:01:11 +1100 (EST) Received: by ozlabs.org (Postfix) id 2F3541007DB; Thu, 15 Dec 2011 22:00:54 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from mail.windriver.com (mail.windriver.com [147.11.1.11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mail.windriver.com", Issuer "Intel External Basic Issuing CA 3A" (not verified)) by ozlabs.org (Postfix) with ESMTPS id BF6ED1007D6 for ; Thu, 15 Dec 2011 22:00:52 +1100 (EST) Received: from ALA-HCA.corp.ad.wrs.com (ala-hca [147.11.189.40]) by mail.windriver.com (8.14.3/8.14.3) with ESMTP id pBFB0mVO004781 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Thu, 15 Dec 2011 03:00:48 -0800 (PST) Received: from localhost.localdomain (128.224.162.71) by ALA-HCA.corp.ad.wrs.com (147.11.189.50) with Microsoft SMTP Server id 14.1.255.0; Thu, 15 Dec 2011 03:00:47 -0800 From: Tiejun Chen To: , Subject: [PATCH v2 1/3] powerpc/kprobe: introduce a new thread flag Date: Thu, 15 Dec 2011 19:00:08 +0800 Message-ID: <1323946810-4868-2-git-send-email-tiejun.chen@windriver.com> X-Mailer: git-send-email 1.5.6 In-Reply-To: <1323946810-4868-1-git-send-email-tiejun.chen@windriver.com> References: <1323946810-4868-1-git-send-email-tiejun.chen@windriver.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org We need to add a new thread flag, TIF_EMULATE_STACK_STORE, for emulating stack store operation while exiting exception. Signed-off-by: Tiejun Chen --- arch/powerpc/include/asm/thread_info.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index 836f231..f414fee 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h @@ -112,6 +112,8 @@ static inline struct thread_info *current_thread_info(void) #define TIF_FREEZE 14 /* Freezing for suspend */ #define TIF_SYSCALL_TRACEPOINT 15 /* syscall tracepoint instrumentation */ #define TIF_RUNLATCH 16 /* Is the runlatch enabled? */ +#define TIF_EMULATE_STACK_STORE 17 /* Is an instruction emulation + for stack store? */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1<