From patchwork Wed Dec 1 09:29:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingkai Hu X-Patchwork-Id: 73782 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 0341E1009B6 for ; Wed, 1 Dec 2010 21:20:47 +1100 (EST) Received: by ozlabs.org (Postfix) id 7023EB70AF; Wed, 1 Dec 2010 21:20:41 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org X-Greylist: delayed 908 seconds by postgrey-1.32 at bilbo; Wed, 01 Dec 2010 21:20:40 EST Received: from AM1EHSOBE005.bigfish.com (am1ehsobe005.messaging.microsoft.com [213.199.154.208]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Cybertrust SureServer Standard Validation CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 63773B708B for ; Wed, 1 Dec 2010 21:20:40 +1100 (EST) Received: from mail61-am1-R.bigfish.com (10.3.201.253) by AM1EHSOBE005.bigfish.com (10.3.204.25) with Microsoft SMTP Server id 14.1.225.8; Wed, 1 Dec 2010 10:05:28 +0000 Received: from mail61-am1 (localhost.localdomain [127.0.0.1]) by mail61-am1-R.bigfish.com (Postfix) with ESMTP id 11FC7990530 for ; Wed, 1 Dec 2010 10:05:28 +0000 (UTC) X-SpamScore: 5 X-BigFish: VS5(zza615mzz1202hzz8275bhz2dh2a8h691h668h67dh61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:az33egw01.freescale.net; RD:az33egw01.freescale.net; EFVD:NLI Received: from mail61-am1 (localhost.localdomain [127.0.0.1]) by mail61-am1 (MessageSwitch) id 1291197927719665_20267; Wed, 1 Dec 2010 10:05:27 +0000 (UTC) Received: from AM1EHSMHS004.bigfish.com (unknown [10.3.201.243]) by mail61-am1.bigfish.com (Postfix) with ESMTP id AD77014E0050 for ; Wed, 1 Dec 2010 10:05:27 +0000 (UTC) Received: from az33egw01.freescale.net (192.88.158.102) by AM1EHSMHS004.bigfish.com (10.3.207.104) with Microsoft SMTP Server (TLS) id 14.1.225.8; Wed, 1 Dec 2010 10:05:23 +0000 Received: from az33smr01.freescale.net (az33smr01.freescale.net [10.64.34.199]) by az33egw01.freescale.net (8.14.3/8.14.3) with ESMTP id oB1A5Ke1007661 for ; Wed, 1 Dec 2010 03:05:20 -0700 (MST) Received: from zch01exm21.fsl.freescale.net (zch01exm21.ap.freescale.net [10.192.129.205]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id oB1A5JqJ028890 for ; Wed, 1 Dec 2010 04:05:19 -0600 (CST) Received: from localhost ([10.193.20.106]) by zch01exm21.fsl.freescale.net with Microsoft SMTPSVC(6.0.3790.4675); Wed, 1 Dec 2010 18:06:38 +0800 From: Mingkai Hu To: , Subject: [PATCH] eSPI: change the read behavior of the SPIRF Date: Wed, 1 Dec 2010 17:29:18 +0800 Message-ID: <1291195758-12322-1-git-send-email-Mingkai.hu@freescale.com> X-Mailer: git-send-email 1.6.4 X-OriginalArrivalTime: 01 Dec 2010 10:06:38.0753 (UTC) FILETIME=[71BF7110:01CB913F] MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: kumar.gala@freescale.com, Mingkai Hu X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the amount of data in the receive FIFO, so read the SPIRF byte by byte when the data in receive FIFO is less than 4 bytes. On Simics, when read N bytes that exceed the amout of data in receive FIFO, we can't read the data out, that is we can't clear the rx FIFO, then the CPU will loop on the espi rx interrupt. Signed-off-by: Mingkai Hu --- drivers/spi/spi_fsl_espi.c | 19 ++++++++++++++++--- 1 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi_fsl_espi.c b/drivers/spi/spi_fsl_espi.c index e3b4f64..ae78926 100644 --- a/drivers/spi/spi_fsl_espi.c +++ b/drivers/spi/spi_fsl_espi.c @@ -507,16 +507,29 @@ void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events) /* We need handle RX first */ if (events & SPIE_NE) { - u32 rx_data; + u32 rx_data, tmp; + u8 rx_data_8; /* Spin until RX is done */ while (SPIE_RXCNT(events) < min(4, mspi->len)) { cpu_relax(); events = mpc8xxx_spi_read_reg(®_base->event); } - mspi->len -= 4; - rx_data = mpc8xxx_spi_read_reg(®_base->receive); + if (mspi->len >= 4) { + rx_data = mpc8xxx_spi_read_reg(®_base->receive); + } else { + tmp = mspi->len; + rx_data = 0; + while (tmp--) { + rx_data_8 = in_8((u8 *)®_base->receive); + rx_data |= (rx_data_8 << (tmp * 8)); + } + + rx_data <<= (4 - mspi->len) * 8; + } + + mspi->len -= 4; if (mspi->rx) mspi->get_rx(rx_data, mspi);