From patchwork Mon Apr 12 16:21:50 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Becky Bruce X-Patchwork-Id: 49976 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 89EA5B7F7F for ; Tue, 13 Apr 2010 02:22:06 +1000 (EST) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B3C6EB7C33 for ; Tue, 13 Apr 2010 02:21:58 +1000 (EST) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id o3CGLoTR006631; Mon, 12 Apr 2010 11:21:51 -0500 From: Becky Bruce To: galak@kernel.crashing.org, benh@kernel.crashing.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH V2] fsl_booke: Correct test for MMU_FTR_BIG_PHYS Date: Mon, 12 Apr 2010 11:21:50 -0500 Message-Id: <1271089310-17607-1-git-send-email-beckyb@kernel.crashing.org> X-Mailer: git-send-email 1.6.0.6 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org The code was looking for this in cpu_features, not mmu_features. Fix this. Signed-off-by: Becky Bruce --- Switched to mmu_has_feature..... arch/powerpc/mm/fsl_booke_mmu.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index c539472..3260fdf 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c @@ -116,7 +116,7 @@ void loadcam_entry(int idx) mtspr(SPRN_MAS2, TLBCAM[idx].MAS2); mtspr(SPRN_MAS3, TLBCAM[idx].MAS3); - if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS) + if (mmu_has_feature(MMU_FTR_BIG_PHYS)) mtspr(SPRN_MAS7, TLBCAM[idx].MAS7); asm volatile("isync;tlbwe;isync" : : : "memory"); @@ -152,7 +152,7 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR; TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0); - if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS) + if (mmu_has_feature(MMU_FTR_BIG_PHYS)) TLBCAM[index].MAS7 = (u64)phys >> 32; #ifndef CONFIG_KGDB /* want user access for breakpoints */