| Message ID | eca7e53ced963c97e3363d7598fe3778f35e79f2.1518981147.git.digetx@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Enable Video Decoder on Tegra30 | expand |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index c3e9f1e847db..833d97206aef 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -91,6 +91,14 @@ }; }; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@50000000 { compatible = "nvidia,tegra30-host1x", "simple-bus"; reg = <0x50000000 0x00024000>;
IRAM is a static RAM that consists of four contiguous 64 KiB blocks, it is currently used to store CPU resume code, utilized by the video decoder engine and could be used as a general-purpose fast memory. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- arch/arm/boot/dts/tegra30.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)