From patchwork Thu Nov 19 22:32:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 546731 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 6FB261413F1 for ; Fri, 20 Nov 2015 09:33:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934679AbbKSWdM (ORCPT ); Thu, 19 Nov 2015 17:33:12 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:57794 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934603AbbKSWdK (ORCPT ); Thu, 19 Nov 2015 17:33:10 -0500 Received: from wuerfel.localnet ([134.3.118.24]) by mrelayeu.kundenserver.de (mreue005) with ESMTPSA (Nemesis) id 0MYJFd-1ZvP3C1bWb-00V7EH; Thu, 19 Nov 2015 23:32:35 +0100 From: Arnd Bergmann To: Thierry Reding Cc: Rhyland Klein , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Stephen Warren , Alexandre Courbot , linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] clk: tegra: move _calc_dynamic_ram_rate out of #ifdef Date: Thu, 19 Nov 2015 23:32:33 +0100 Message-ID: <4290741.p1jMzEOUEU@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) MIME-Version: 1.0 X-Provags-ID: V03:K0:FClJe6kkJvMeZcVM/+ZMa2hDefFFX5E0XkopgcgQGKLch8oWgs4 VdpsvXilRLVjStNH3PFSve6NHjld8+B7Uzb3/QkGfoac+td63emy3Cic25mwJGSaRKsEY9D ccuuCEd8SrOYlbGUGJexjbNX49iuG/0VRFrGkedFU6tFd7HzeDQsIt/Qy69+k9ZQBYKXz66 t3hQOEe5jgtEVNvAczujw== X-UI-Out-Filterresults: notjunk:1; V01:K0:k8hfCALrn58=:sE8W/OAmKeFsZW5FDlWmAu skhXYGSZroPcvYbe6yvk6cowr3uUQy9/4UhcQ+lG6tC8uNVR3Y/ylivh3Ky0TNoapancGaUeh 7clerhmN+XfdvKCGTi0WPFnRfrjmvZOpsfWHIWYPQ1xTkBsCmyYV5cN5WB2UAU2BJ7//bWzpa T4bMTGjrHiKgtnqbb+ECTqY3cMCIdGCfwUpfIr8UbWp4tj7Yuk/cG/IpPEdLJr8bFSEm1t7cy EzJWi4X38EEYhkvwKrnUz/3t/A7yewHQPmxvCLO5bqvOkjLHiyhRQQoG7FuW2fLW8GWZkWZrw bUwcuoHEYOe7fgbBAtQ8fn1kZfU4cqzSq+CAyGO+3M6CFL0ynvm3pyvq8Z7CWXqqEbodZp20o r3DCVPvHxS0qSWa+GUmd+A/63i8RLethQA44+v0coj35YjtYJJa3cV/7KCJ6L/cfRs/tdQ9fw MWovqy+Mpbw5afKYrdSegX5Ctn4LnluoWBJFS/1b/Se0yNLFKgKKbi7p/wZ92VIg07c1Kf9FK iIJVNAQUAO+LYNQ4trtGYTXuxZcZVhiJbXjlnAF/4S/Al6HB1yJztZdNqyeY4/CMmlImmuP32 LfYLRPDjySywz+MKTNcftbYknSHeXwZTkD4BZET5fzJ0HDR2UjZFAYPA1V+XAV82Bg+ugSfKS 00SN7zs6xXZb9P63bDbsXbVVdtnXwUfHDZBpREtqPVKVLWAQURsmScjXBYJpVSqwhubi7zEyH 77dgDmaPruSDmfXW Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org _calc_dynamic_ram_rate is defined inside an #ifdef but called later in the same file outside of that #ifdef, which can cause a build error: drivers/clk/tegra/clk-pll.c: In function '_tegra_clk_register_pll': drivers/clk/tegra/clk-pll.c:1541:29: error: '_calc_dynamic_ramp_rate' undeclared (first use in this function) This moves both _calc_dynamic_ram_rate and _pll_fixed_mdiv in front of the #ifdef to make all configurations compile again. Signed-off-by: Arnd Bergmann Fixes: 44c8b9fa432c ("clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate") ---- The patch that caused it appears to be older, but I only ran into the randconfig bug today for the first time. Apparently the commit is only in linux-next at the moment, not in 4.4-rc1 Acked-by: Rhyland Klein --- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 9734ffa185d3..94f3a6d34e3a 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -967,11 +967,6 @@ const struct clk_ops tegra_clk_plle_ops = { .enable = clk_plle_enable, }; -#if defined(CONFIG_ARCH_TEGRA_114_SOC) || \ - defined(CONFIG_ARCH_TEGRA_124_SOC) || \ - defined(CONFIG_ARCH_TEGRA_132_SOC) || \ - defined(CONFIG_ARCH_TEGRA_210_SOC) - static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, unsigned long parent_rate) { @@ -990,6 +985,40 @@ static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, return 1; } +static int _calc_dynamic_ramp_rate(struct clk_hw *hw, + struct tegra_clk_pll_freq_table *cfg, + unsigned long rate, unsigned long parent_rate) +{ + struct tegra_clk_pll *pll = to_clk_pll(hw); + unsigned int p; + int p_div; + + if (!rate) + return -EINVAL; + + p = DIV_ROUND_UP(pll->params->vco_min, rate); + cfg->m = _pll_fixed_mdiv(pll->params, parent_rate); + cfg->output_rate = rate * p; + cfg->n = cfg->output_rate * cfg->m / parent_rate; + cfg->input_rate = parent_rate; + + p_div = _p_div_to_hw(hw, p); + if (p_div < 0) + return p_div; + + cfg->p = p_div; + + if (cfg->n > divn_max(pll) || cfg->output_rate > pll->params->vco_max) + return -EINVAL; + + return 0; +} + +#if defined(CONFIG_ARCH_TEGRA_114_SOC) || \ + defined(CONFIG_ARCH_TEGRA_124_SOC) || \ + defined(CONFIG_ARCH_TEGRA_132_SOC) || \ + defined(CONFIG_ARCH_TEGRA_210_SOC) + u16 tegra_pll_get_fixed_mdiv(struct clk_hw *hw, unsigned long input_rate) { struct tegra_clk_pll *pll = to_clk_pll(hw); @@ -1039,35 +1068,6 @@ static int _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params, return 0; } -static int _calc_dynamic_ramp_rate(struct clk_hw *hw, - struct tegra_clk_pll_freq_table *cfg, - unsigned long rate, unsigned long parent_rate) -{ - struct tegra_clk_pll *pll = to_clk_pll(hw); - unsigned int p; - int p_div; - - if (!rate) - return -EINVAL; - - p = DIV_ROUND_UP(pll->params->vco_min, rate); - cfg->m = _pll_fixed_mdiv(pll->params, parent_rate); - cfg->output_rate = rate * p; - cfg->n = cfg->output_rate * cfg->m / parent_rate; - cfg->input_rate = parent_rate; - - p_div = _p_div_to_hw(hw, p); - if (p_div < 0) - return p_div; - - cfg->p = p_div; - - if (cfg->n > divn_max(pll) || cfg->output_rate > pll->params->vco_max) - return -EINVAL; - - return 0; -} - static int _pll_ramp_calc_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate)