| Message ID | 20240109091708.66977-5-akhilrajeev@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show
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Tue, 9 Jan 2024 01:18:49 -0800 Received: from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 9 Jan 2024 01:18:48 -0800 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.14) by mail.nvidia.com (10.129.68.9) with Microsoft SMTP Server id 15.2.986.41 via Frontend Transport; Tue, 9 Jan 2024 01:18:44 -0800 From: Akhil R <akhilrajeev@nvidia.com> To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <catalin.marinas@arm.com>, <will@kernel.org>, <mperttunen@nvidia.com>, <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <krzk@kernel.org> CC: Akhil R <akhilrajeev@nvidia.com> Subject: [PATCH v3 4/5] arm64: defconfig: Enable Tegra Security Engine Date: Tue, 9 Jan 2024 14:47:07 +0530 Message-ID: <20240109091708.66977-5-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240109091708.66977-1-akhilrajeev@nvidia.com> References: <20240109091708.66977-1-akhilrajeev@nvidia.com> X-NVConfidentiality: public Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: <linux-tegra.vger.kernel.org> List-Subscribe: <mailto:linux-tegra+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-tegra+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529F:EE_|LV2PR12MB5726:EE_ X-MS-Office365-Filtering-Correlation-Id: a2d7e4bf-7ebf-483d-5ce8-08dc10f404d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Add Tegra Security Engine driver
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expand
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diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0e67a4849b91..4f5b01cc3b1a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1602,6 +1602,7 @@ CONFIG_CRYPTO_DEV_FSL_CAAM=m CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_CRYPTO_DEV_QCOM_RNG=m +CONFIG_CRYPTO_DEV_TEGRA=m CONFIG_CRYPTO_DEV_CCREE=m CONFIG_CRYPTO_DEV_HISI_SEC2=m CONFIG_CRYPTO_DEV_HISI_ZIP=m
Enable Tegra Security Engine which can accelerate various AES and HASH algorithms on supported hardware. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)