| Message ID | 20210708103932.1691306-1-thierry.reding@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: tegra: Enable SMMU support for USB on Tegra194 | expand |
On 08/07/2021 11:39, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > As of commit c7289b1c8a4e ("arm64: tegra: Enable SMMU support on > Tegra194"), SMMU support is enabled system-wide on Tegra194. However, > there was a bit of overlap between the SMMU enablement and the USB > support addition, so the USB device tree nodes are missing the iommus > and interconnects properties. This in turn leads to SMMU faults for > these devices, since by default the ARM SMMU will fault. > > Add the iommus and interconnects properties to the XUSB and XUDC device > tree nodes to restore their functionality. > > Fixes: c7289b1c8a4e ("arm64: tegra: Enable SMMU support on Tegra194") > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > index 07e61f084123..7cc6dc19ff9f 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > @@ -952,6 +952,10 @@ usb@3550000 { > <&bpmp TEGRA194_CLK_XUSB_SS>, > <&bpmp TEGRA194_CLK_XUSB_FS>; > clock-names = "dev", "ss", "ss_src", "fs_src"; > + interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>, > + <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVW &emc>; > + interconnect-names = "dma-mem", "write"; > + iommus = <&smmu TEGRA194_SID_XUSB_DEV>; > power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>, > <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>; > power-domain-names = "dev", "ss"; > @@ -981,6 +985,10 @@ usb@3610000 { > "xusb_ss", "xusb_ss_src", "xusb_hs_src", > "xusb_fs_src", "pll_u_480m", "clk_m", > "pll_e"; > + interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>, > + <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>; > + interconnect-names = "dma-mem", "write"; > + iommus = <&smmu TEGRA194_SID_XUSB_HOST>; > > power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>, > <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>; > Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Thanks! Jon
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 07e61f084123..7cc6dc19ff9f 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -952,6 +952,10 @@ usb@3550000 { <&bpmp TEGRA194_CLK_XUSB_SS>, <&bpmp TEGRA194_CLK_XUSB_FS>; clock-names = "dev", "ss", "ss_src", "fs_src"; + interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>, + <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVW &emc>; + interconnect-names = "dma-mem", "write"; + iommus = <&smmu TEGRA194_SID_XUSB_DEV>; power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>, <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>; power-domain-names = "dev", "ss"; @@ -981,6 +985,10 @@ usb@3610000 { "xusb_ss", "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", "pll_u_480m", "clk_m", "pll_e"; + interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>, + <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>; + interconnect-names = "dma-mem", "write"; + iommus = <&smmu TEGRA194_SID_XUSB_HOST>; power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>, <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;