diff mbox series

[v1] clk: tegra: Fix duplicated SE clock entry

Message ID 20201025224212.7790-1-digetx@gmail.com
State Deferred
Headers show
Series [v1] clk: tegra: Fix duplicated SE clock entry | expand

Commit Message

Dmitry Osipenko Oct. 25, 2020, 10:42 p.m. UTC
The periph_clks[] array contains duplicated entry for Security Engine
clock which was meant to be defined for T210, but it wasn't added
properly. This patch corrects the T210 SE entry and fixes the following
error message on T114/T124: "Tegra clk 127: register failed with -17".

Fixes: dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")
Tested-by Nicolas Chauvet <kwizart@gmail.com>
Reported-by Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/clk/tegra/clk-id.h           | 1 +
 drivers/clk/tegra/clk-tegra-periph.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

Comments

Stephen Boyd Dec. 10, 2020, 1:27 a.m. UTC | #1
Quoting Dmitry Osipenko (2020-10-25 15:42:12)
> The periph_clks[] array contains duplicated entry for Security Engine
> clock which was meant to be defined for T210, but it wasn't added
> properly. This patch corrects the T210 SE entry and fixes the following
> error message on T114/T124: "Tegra clk 127: register failed with -17".
> 
> Fixes: dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")
> Tested-by Nicolas Chauvet <kwizart@gmail.com>
> Reported-by Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---

Looks correct. Should I pick this up Thierry?

>  drivers/clk/tegra/clk-id.h           | 1 +
>  drivers/clk/tegra/clk-tegra-periph.c | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
> index ff7da2d3e94d..24413812ec5b 100644
> --- a/drivers/clk/tegra/clk-id.h
> +++ b/drivers/clk/tegra/clk-id.h
> @@ -227,6 +227,7 @@ enum clk_id {
>         tegra_clk_sdmmc4,
>         tegra_clk_sdmmc4_8,
>         tegra_clk_se,
> +       tegra_clk_se_10,
>         tegra_clk_soc_therm,
>         tegra_clk_soc_therm_8,
>         tegra_clk_sor0,
> diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
> index 2b2a3b81c16b..60cc34f90cb9 100644
> --- a/drivers/clk/tegra/clk-tegra-periph.c
> +++ b/drivers/clk/tegra/clk-tegra-periph.c
> @@ -630,7 +630,7 @@ static struct tegra_periph_init_data periph_clks[] = {
>         INT8("host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_8),
>         INT8("host1x", mux_pllc4_out1_pllc_pllc4_out2_pllp_clkm_plla_pllc4_out0, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_9),
>         INT8("se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
> -       INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
> +       INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se_10),
>         INT8("2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d_8),
>         INT8("3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d_8),
>         INT8("vic03", mux_pllm_pllc_pllp_plla_pllc2_c3_clkm, CLK_SOURCE_VIC03, 178, 0, tegra_clk_vic03),
Thierry Reding Dec. 10, 2020, 8:02 a.m. UTC | #2
On Mon, Oct 26, 2020 at 01:42:12AM +0300, Dmitry Osipenko wrote:
> The periph_clks[] array contains duplicated entry for Security Engine
> clock which was meant to be defined for T210, but it wasn't added
> properly. This patch corrects the T210 SE entry and fixes the following
> error message on T114/T124: "Tegra clk 127: register failed with -17".
> 
> Fixes: dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")
> Tested-by Nicolas Chauvet <kwizart@gmail.com>
> Reported-by Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/clk/tegra/clk-id.h           | 1 +
>  drivers/clk/tegra/clk-tegra-periph.c | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)

Acked-by: Thierry Reding <treding@nvidia.com>
Thierry Reding Dec. 10, 2020, 8:03 a.m. UTC | #3
On Wed, Dec 09, 2020 at 05:27:10PM -0800, Stephen Boyd wrote:
> Quoting Dmitry Osipenko (2020-10-25 15:42:12)
> > The periph_clks[] array contains duplicated entry for Security Engine
> > clock which was meant to be defined for T210, but it wasn't added
> > properly. This patch corrects the T210 SE entry and fixes the following
> > error message on T114/T124: "Tegra clk 127: register failed with -17".
> > 
> > Fixes: dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")
> > Tested-by Nicolas Chauvet <kwizart@gmail.com>
> > Reported-by Nicolas Chauvet <kwizart@gmail.com>
> > Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> > ---
> 
> Looks correct. Should I pick this up Thierry?

Yes, please. Thanks for catching this, it had slipped through my filter.

Thierry
Stephen Boyd Dec. 10, 2020, 8:52 p.m. UTC | #4
Quoting Dmitry Osipenko (2020-10-25 15:42:12)
> The periph_clks[] array contains duplicated entry for Security Engine
> clock which was meant to be defined for T210, but it wasn't added
> properly. This patch corrects the T210 SE entry and fixes the following
> error message on T114/T124: "Tegra clk 127: register failed with -17".
> 
> Fixes: dc37fec48314 ("clk: tegra: periph: Add new periph clks and muxes for Tegra210")
> Tested-by Nicolas Chauvet <kwizart@gmail.com>
> Reported-by Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
index ff7da2d3e94d..24413812ec5b 100644
--- a/drivers/clk/tegra/clk-id.h
+++ b/drivers/clk/tegra/clk-id.h
@@ -227,6 +227,7 @@  enum clk_id {
 	tegra_clk_sdmmc4,
 	tegra_clk_sdmmc4_8,
 	tegra_clk_se,
+	tegra_clk_se_10,
 	tegra_clk_soc_therm,
 	tegra_clk_soc_therm_8,
 	tegra_clk_sor0,
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 2b2a3b81c16b..60cc34f90cb9 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -630,7 +630,7 @@  static struct tegra_periph_init_data periph_clks[] = {
 	INT8("host1x", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_8),
 	INT8("host1x", mux_pllc4_out1_pllc_pllc4_out2_pllp_clkm_plla_pllc4_out0, CLK_SOURCE_HOST1X, 28, 0, tegra_clk_host1x_9),
 	INT8("se", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
-	INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se),
+	INT8("se", mux_pllp_pllc2_c_c3_clkm, CLK_SOURCE_SE, 127, TEGRA_PERIPH_ON_APB, tegra_clk_se_10),
 	INT8("2d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_2D, 21, 0, tegra_clk_gr2d_8),
 	INT8("3d", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_3D, 24, 0, tegra_clk_gr3d_8),
 	INT8("vic03", mux_pllm_pllc_pllp_plla_pllc2_c3_clkm, CLK_SOURCE_VIC03, 178, 0, tegra_clk_vic03),