@@ -16,8 +16,10 @@ obj-y += clk-tegra-pmc.o
obj-y += clk-tegra-fixed.o
obj-y += clk-tegra-super-gen4.o
obj-$(CONFIG_TEGRA_CLK_EMC) += clk-emc.o
-obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o
-obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o
+obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o \
+ tegra20_automative_dt_overlay.dtb.o
+obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o \
+ tegra30_automative_dt_overlay.dtb.o
obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o
obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124.o
obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124-dfll-fcpu.o
@@ -15,6 +15,7 @@ config ARCH_TEGRA_2x_SOC
select SOC_TEGRA_FLOWCTRL
select SOC_TEGRA_PMC
select TEGRA_TIMER
+ select OF_OVERLAY
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -28,6 +29,7 @@ config ARCH_TEGRA_3x_SOC
select SOC_TEGRA_FLOWCTRL
select SOC_TEGRA_PMC
select TEGRA_TIMER
+ select OF_OVERLAY
help
Support for NVIDIA Tegra T30 processor family, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
Signed-off-by: Kejia Hu <kejia.hu@codethink.co.uk> --- drivers/clk/tegra/Makefile | 6 ++++-- drivers/soc/tegra/Kconfig | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-)