From patchwork Thu Jan 31 09:24:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 1034080 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="g8zwTgNp"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43qvvP07MVz9sDB for ; Thu, 31 Jan 2019 20:24:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731475AbfAaJYc (ORCPT ); Thu, 31 Jan 2019 04:24:32 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:4717 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727501AbfAaJYb (ORCPT ); Thu, 31 Jan 2019 04:24:31 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 31 Jan 2019 01:24:33 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 31 Jan 2019 01:24:31 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 31 Jan 2019 01:24:31 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 31 Jan 2019 09:24:30 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 31 Jan 2019 09:24:30 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Thu, 31 Jan 2019 01:24:30 -0800 From: Joseph Lo To: Thierry Reding , Jonathan Hunter CC: , , Joseph Lo Subject: [PATCH V4 7/7] arm64: dts: tegra210-smaug: Enable CPU idle support Date: Thu, 31 Jan 2019 17:24:10 +0800 Message-ID: <20190131092410.28222-8-josephl@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190131092410.28222-1-josephl@nvidia.com> References: <20190131092410.28222-1-josephl@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1548926673; bh=20KZoYwg3LJftlzb4M1+rj3lAOjkZJ7FzeZw38JO9Rk=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=g8zwTgNphig3fpgSZX94lXHC0O7RN3F3opz3QJycvYmYJogV5rXs3CnPa36I9JM8R y1aLAoelvx6bBKbWjLPsBYs87/493VdYml/JRnOqqUfR4m04KiYnjlc/ZabWJJKr8Y XuuJ1aoExPJ0P84WR5ie/Pi4+uE4eHPDw3vM2woocakodLPI8+AdGlBQxbMZaWSg9S WbBFhLw0mgHO9B0dWJ3KkD6nOFL8WsASz9aJ12ya1Ksf+WqGCX0IHWixHtSMvHPhvf Tv/vzPVgUTzB09wjMz/UTkGWEKRsOWf2+ZZ2eMp2nyjjNzNqk9YwNA1QViKO63NpmI RpS4PpSL4hYhQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable CPU idle support for Smaug platform. Signed-off-by: Joseph Lo --- v4: * no change v3: * no change v2: * no change --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 5a67890cfb7a..da0eb4530acf 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1751,6 +1751,13 @@ cpu@3 { enable-method = "psci"; }; + + idle-states { + c7 { + arm,psci-suspend-param = <0x00010007>; + status = "okay"; + }; + }; }; gpio-keys {