Message ID | 20181213093438.29621-22-josephl@nvidia.com |
---|---|
State | Changes Requested |
Headers | show
Return-Path: <linux-tegra-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="IwlfukVD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43FpSv66LQz9s4s for <incoming@patchwork.ozlabs.org>; Thu, 13 Dec 2018 20:35:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727720AbeLMJfl (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Thu, 13 Dec 2018 04:35:41 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:8214 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727718AbeLMJfk (ORCPT <rfc822;linux-tegra@vger.kernel.org>); Thu, 13 Dec 2018 04:35:40 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id <B5c1227e70000>; Thu, 13 Dec 2018 01:35:35 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 13 Dec 2018 01:35:39 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 13 Dec 2018 01:35:39 -0800 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 13 Dec 2018 09:35:39 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 13 Dec 2018 09:35:39 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 13 Dec 2018 09:35:39 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id <B5c1227ea0002>; Thu, 13 Dec 2018 01:35:39 -0800 From: Joseph Lo <josephl@nvidia.com> To: Thierry Reding <thierry.reding@gmail.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Jonathan Hunter <jonathanh@nvidia.com> CC: <linux-arm-kernel@lists.infradead.org>, <linux-tegra@vger.kernel.org>, <linux-clk@vger.kernel.org>, Joseph Lo <josephl@nvidia.com> Subject: [PATCH V2 21/21] arm64: defconfig: Enable MAX8973 regulator Date: Thu, 13 Dec 2018 17:34:38 +0800 Message-ID: <20181213093438.29621-22-josephl@nvidia.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181213093438.29621-1-josephl@nvidia.com> References: <20181213093438.29621-1-josephl@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1544693735; bh=lPbiai2Sq2VRPhtBPhrO+iwkLTAL6KUKERvtu677LGo=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=IwlfukVDXacAuzwbNAbJy96jZ/Ud1a19XsXrN+AJVFyIwtB8EollXJP6DFoNNCfXe 6YHKf8uwyeyO6/0GiG1zYGfWcwwAfXrTVZ6hbqJ/si8jk0FylKsSDucacpmOyJieTd MYDYD2Unn8996QDt6uAdtNTwFNCMuNBFbiG2rUO8DfeauKuU/wEOGXXo3cYEQZ1fn3 qxFlt1weJWjIF4qX+ys5jREhcg/EtIkJfIxekZa+YYJTTUlHk4lnhS6j6ABf5x28nN mMwjlQJ5BW1CGzX8CFkoX1ayoT5W/Affgie+G/6bkQiQUfLZFO0oKlkqQ9q1fnoR1a 2/W9hp0z0WaQw== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: <linux-tegra.vger.kernel.org> X-Mailing-List: linux-tegra@vger.kernel.org |
Series |
Tegra210 DFLL support
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expand
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diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5c2b1f6842f8..8dab129395a1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -420,6 +420,7 @@ CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y +CONFIG_REGULATOR_MAX8973=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_QCOM_RPMH=y CONFIG_REGULATOR_QCOM_SMD_RPM=y