| Message ID | 20180723123658.980-16-marcel@ziswiler.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: dts: tegra: colibri_t30: major revamp | expand |
On Mon, 2018-07-23 at 14:36 +0200, Marcel Ziswiler wrote: > From: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control > register of the TPS65911 PMIC. > > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > --- > > arch/arm/boot/dts/tegra30-colibri.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi > b/arch/arm/boot/dts/tegra30-colibri.dtsi > index 8266e42e1630..6608243e1d55 100644 > --- a/arch/arm/boot/dts/tegra30-colibri.dtsi > +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi > @@ -902,6 +902,14 @@ > nvidia,core-pwr-off-time = <0>; > nvidia,core-power-req-active-high; > nvidia,sys-clock-req-active-high; > + > + /* Set DEV_OFF bit in DCDC control register of > TPS65911 PMIC */ > + i2c-thermtrip { > + nvidia,i2c-controller-id = <4>; > + nvidia,bus-addr = <0x2d>; > + nvidia,reg-addr = <0x3e>; When running some more tests I just realized that the reg-addr should really be 0x3f instead. Will change this in a v2. > + nvidia,reg-data = <0x1>; > + }; > }; > > ahub@70080000 {
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 8266e42e1630..6608243e1d55 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -902,6 +902,14 @@ nvidia,core-pwr-off-time = <0>; nvidia,core-power-req-active-high; nvidia,sys-clock-req-active-high; + + /* Set DEV_OFF bit in DCDC control register of TPS65911 PMIC */ + i2c-thermtrip { + nvidia,i2c-controller-id = <4>; + nvidia,bus-addr = <0x2d>; + nvidia,reg-addr = <0x3e>; + nvidia,reg-data = <0x1>; + }; }; ahub@70080000 {