From patchwork Fri Sep 1 14:53:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 808711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ozDtS7Vd"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xkMgw25tqz9t2Z for ; Sat, 2 Sep 2017 00:53:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752091AbdIAOxr (ORCPT ); Fri, 1 Sep 2017 10:53:47 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:32842 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751970AbdIAOxq (ORCPT ); Fri, 1 Sep 2017 10:53:46 -0400 Received: by mail-wm0-f67.google.com with SMTP id 187so201533wmn.0; Fri, 01 Sep 2017 07:53:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=hbesb6B5iT4D+zwLy6om9RxZmEzRDoIXup5Pdze/aaU=; b=ozDtS7VdpPOF7k/MPEqt2p3z+kekDvjLLLu38o0Vcf+envXAnLUsrqCYl8q1IKb7vT xBF6SMWfntrTVbNFzplCQJLXF+0f74V5otTjzAHhaUCLOcoy0WkLTejxJ67s9ryiCAPd pcz/rTiiA8K18pBrqro1V9j7ZZAts9zFd4gadU9Ypm3JuLJ8K1UBn1SMCv0dRbw9lQvK QDEHzbXycFbbuz1koCoRaateSgJGFFKsqBG0ASpKmm5a1CL4q2S6pFfYt7ePwpIVO9Cd 0zn9KOQxXd9T16ej9z55DAuxKZYMntCHEMshvCVOSNLzUru7H6M7MHVWA7pAJ531LYVt IKYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=hbesb6B5iT4D+zwLy6om9RxZmEzRDoIXup5Pdze/aaU=; b=ANSQ7neogyzeZXZFVZq22gq5y2k2lbiSDmIUvsIyK6egRDsdC+G4oIAq5ep0NB9fug qtoZBu4dXTdkcVAzuyAgt5858wnQHhPMw1pXTSkdxqrDxCXq0+C0ZG5Q2QSIoJbBBoaU rZbLnjZGpa+hVt6NKiPJom5FcgfhsrjY33yP3rWudwptHSq6CCy6K80w+P1KbLBowinE JxifqdoJZrLXb20xbXepR5HdnyqJPgBqVUwwGVONKjjVJtw3qnQ3c3OMmQskNDg7VxJJ 2BOjKK38C2EuP6i8eDlms1I9tkne1aWNyHZ/tH8gy5ih/0H8t/znEIeQiqmXPNTcr3GV m0fg== X-Gm-Message-State: AHPjjUj6uhO+X8ATnh8y9/KS4LrX34gndQAG7lR1f+imTIxRSfh6j7hb 0iFaMshmuP1vrQ== X-Google-Smtp-Source: ADKCNb5LuWfxh4VOw0zErFlFpzS/WU63qv32k0aZWDn4AHQjQWtK+Y2EbXXxP2vwO7qQRnPWEcu0Tw== X-Received: by 10.28.105.9 with SMTP id e9mr610711wmc.29.1504277624805; Fri, 01 Sep 2017 07:53:44 -0700 (PDT) Received: from localhost (p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de. [2003:e4:1bd6:d600:76d0:2bff:fe27:3f51]) by smtp.gmail.com with ESMTPSA id o7sm205450wra.39.2017.09.01.07.53.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Sep 2017 07:53:43 -0700 (PDT) From: Thierry Reding To: Michael Turquette , Stephen Boyd Cc: Peter De Schrijver , Jonathan Hunter , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock Date: Fri, 1 Sep 2017 16:53:40 +0200 Message-Id: <20170901145343.19890-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.13.3 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding The sor1_src clock implemented on Tegra210 is modelled the wrong way around, which causes some issues with HDMI and DP support. This clock implementation is provided by BPMP on Tegra186, which models this in a more correct way. Since this introduces incompatibilities between the two SoC generations which we want to avoid, the Tegra210 will be fixed in subsequent patches. This change adds sor1_out as an alias for sor1_src. Signed-off-by: Thierry Reding --- include/dt-bindings/clock/tegra210-car.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 46689cd3750b..43c4a8407333 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -309,6 +309,7 @@ #define TEGRA210_CLK_BLINK 280 /* 281 */ #define TEGRA210_CLK_SOR1_SRC 282 +#define TEGRA210_CLK_SOR1_OUT 282 /* 283 */ #define TEGRA210_CLK_XUSB_HOST_SRC 284 #define TEGRA210_CLK_XUSB_FALCON_SRC 285