| Message ID | 20160819173233.13260-9-thierry.reding@gmail.com |
|---|---|
| State | Deferred |
| Headers | show |
On 08/19/2016 11:32 AM, Thierry Reding wrote: > From: Joseph Lo <josephl@nvidia.com> > > This adds the initial support of Tegra186 SoC. It provides enough to > enable the serial console and boot from an initial ramdisk. > diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > + uarta: serial@03100000 { > + compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart"; > + reg = <0x0 0x03100000 0x0 0x40>; At least in the unit address, I think we want to suppress leading zeroes (s/03100000/3100000/). I'd argue we should do the same in the reg values too, although that makes no difference to the DTB itself. Same comment for other nodes. > + sysram@30000000 { > + compatible = "nvidia,tegra186-sysram", "mmio-ram"; > + reg = <0x0 0x30000000 0x0 0x4ffff>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0 0x0 0x0 0x30000000 0x0 0x4ffff>; Shouldn't 0x4ffff be 0x50000 since it's length not max? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 08/19/2016 11:32 AM, Thierry Reding wrote: > From: Joseph Lo <josephl@nvidia.com> > > This adds the initial support of Tegra186 SoC. It provides enough to > enable the serial console and boot from an initial ramdisk. > diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > + bpmp: bpmp { > + compatible = "nvidia,tegra186-bpmp"; > + mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB > + TEGRA_HSP_DB_MASTER_BPMP>; > + shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + > + bpmp_i2c: i2c { > + compatible = "nvidia,tegra186-bpmp-i2c"; > + nvidia,bpmp = <&bpmp>; > + nvidia,bpmp-bus-id = <5>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + }; Back on 7/20, Rob Herring wrote: > Just 'i2c' here. With that: > > Acked-by: Rob Herring <robh@kernel.org> ... but this series doesn't yet include the BPMP I2C bindings (they've been ack'd so I assume they'll be applied right after this series is). Is it better to leave out the I2C sub-node until after the bindings are applied, or doesn't the order matter too? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi new file mode 100644 index 000000000000..53b89b1c1e1f --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -0,0 +1,86 @@ +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/mailbox/tegra186-hsp.h> + +/ { + compatible = "nvidia,tegra186"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + uarta: serial@03100000 { + compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart"; + reg = <0x0 0x03100000 0x0 0x40>; + reg-shift = <2>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + gic: interrupt-controller@03881000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x0 0x03881000 0x0 0x1000>, + <0x0 0x03882000 0x0 0x2000>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-parent = <&gic>; + }; + + hsp_top0: hsp@03c00000 { + compatible = "nvidia,tegra186-hsp"; + reg = <0x0 0x03c00000 0x0 0xa0000>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "doorbell"; + #mbox-cells = <2>; + status = "disabled"; + }; + + sysram@30000000 { + compatible = "nvidia,tegra186-sysram", "mmio-ram"; + reg = <0x0 0x30000000 0x0 0x4ffff>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0x0 0x0 0x30000000 0x0 0x4ffff>; + + cpu_bpmp_tx: bpmp_shmem@4e000 { + compatible = "nvidia,tegra186-bpmp-shmem"; + reg = <0x0 0x4e000 0x0 0x1000>; + }; + + cpu_bpmp_rx: bpmp_shmem@4f000 { + compatible = "nvidia,tegra186-bpmp-shmem"; + reg = <0x0 0x4f000 0x0 0x1000>; + }; + }; + + bpmp: bpmp { + compatible = "nvidia,tegra186-bpmp"; + mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB + TEGRA_HSP_DB_MASTER_BPMP>; + shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; + #clock-cells = <1>; + #reset-cells = <1>; + + bpmp_i2c: i2c { + compatible = "nvidia,tegra186-bpmp-i2c"; + nvidia,bpmp = <&bpmp>; + nvidia,bpmp-bus-id = <5>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-parent = <&gic>; + }; +};