From patchwork Mon Jun 6 16:36:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 631019 X-Patchwork-Delegate: treding@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rNgMQ6KK9z9t3Z for ; Tue, 7 Jun 2016 02:36:50 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=pIZGLYuq; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752520AbcFFQgu (ORCPT ); Mon, 6 Jun 2016 12:36:50 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:33638 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752410AbcFFQgt (ORCPT ); Mon, 6 Jun 2016 12:36:49 -0400 Received: by mail-wm0-f68.google.com with SMTP id c74so9628518wme.0 for ; Mon, 06 Jun 2016 09:36:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qpWU5qdVPDcf+pGcinVNGMGMyhq9jxyJwpblwzB0JRI=; b=pIZGLYuqqe6h/u97vJdevk+ZpYmpO/Ck8vWAio4jNYQW4/BruBLfR6iYJHNVMrulfz pRMD5dv8FBhb+b1fo6XM18TdeojtaNWgicqmXGy0Xxb4/1MQMsIICse+cjRn6afq5h67 FNakzzWD484G5k/qLkl/YdDdTuRjLb7XUUf1SuAOpIZLX9ihPkqYlAyCQhozUOfiHYo+ AQNd8a28iuFE4+dGlOYW00mwpk17+3KujtJ/2WNlUS2s8kXk8WIvyztT5DtFLjEWaqcj XmB1joJIDaQElhTaWVhVNi35p8bSlwU7Xf0gYf66I5DSskFI5P7o83YQ8AK2OKgTy3h7 NJpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qpWU5qdVPDcf+pGcinVNGMGMyhq9jxyJwpblwzB0JRI=; b=lsY8pHlqBFeWZlr/5XFC7LjU4I0yWqC4vAjvSzBtM38KMz+nlCIp9tolcFWiSTXJi0 wWdwt2lQq7Nj9vnTHEvmIjtLcBIlSeuNdEC3tpJv1kqEbYqndu3BEfroJG6fD2us8t2k Xibtmtw9mSe97XSIKleC09zFBMZR8OuhEllso5McoIUB4YP4POpIfRc8RhmPW6iG+YQS RRvZUb6xBqKMl5R8qZo7TfFuGGJKp/XvY4IGcsK/LuTOnpkf6s+n2UxPezVoSlPz6pqP Vc1k0Dk6XxuAusGXZua2/P9LbBym8v1d0hU6Vxff5lIT+Xlh1UtHkcYOwULORAyxFflM rqsQ== X-Gm-Message-State: ALyK8tIuIjvH5h4+vUKFbMrkAvu7YWrTng6Vvx5LGfmtC0UaItLP/dQ/IUyZUUxSxlsSmA== X-Received: by 10.28.12.8 with SMTP id 8mr13124990wmm.6.1465231008339; Mon, 06 Jun 2016 09:36:48 -0700 (PDT) Received: from localhost (port-6551.pppoe.wtnet.de. [84.46.25.176]) by smtp.gmail.com with ESMTPSA id r16sm1360788wmb.23.2016.06.06.09.36.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jun 2016 09:36:47 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Alexandre Courbot , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/8] arm64: tegra: Add Tegra210 XUSB controller Date: Mon, 6 Jun 2016 18:36:35 +0200 Message-Id: <20160606163637.14234-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160606163637.14234-1-thierry.reding@gmail.com> References: <20160606163637.14234-1-thierry.reding@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Add a device tree node for the Tegra XUSB controller. It contains a phandle to the XUSB pad controller for control of the PHYs assigned to the USB ports. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 694228b9cdf4..ac1fb886ca4c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -621,6 +621,41 @@ status = "disabled"; }; + usb@70090000 { + compatible = "nvidia,tegra210-xusb"; + reg = <0x0 0x70090000 0x0 0x8000>, + <0x0 0x70098000 0x0 0x1000>, + <0x0 0x70099000 0x0 0x1000>; + reg-names = "hcd", "fpci", "ipfs"; + + interrupts = , + ; + + clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>, + <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, + <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, + <&tegra_car TEGRA210_CLK_PLL_U_480M>, + <&tegra_car TEGRA210_CLK_CLK_M>, + <&tegra_car TEGRA210_CLK_PLL_E>; + clock-names = "xusb_host", "xusb_host_src", + "xusb_falcon_src", "xusb_ss", + "xusb_ss_div2", "xusb_ss_src", + "xusb_hs_src", "xusb_fs_src", + "pll_u_480m", "clk_m", "pll_e"; + resets = <&tegra_car 89>, <&tegra_car 156>, + <&tegra_car 143>; + reset-names = "xusb_host", "xusb_ss", "xusb_src"; + + nvidia,xusb-padctl = <&padctl>; + + status = "disabled"; + }; + padctl: padctl@7009f000 { compatible = "nvidia,tegra210-xusb-padctl"; reg = <0x0 0x7009f000 0x0 0x1000>;