From patchwork Mon Jun 6 16:36:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 631017 X-Patchwork-Delegate: treding@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rNgMM59CCz9t3Z for ; Tue, 7 Jun 2016 02:36:47 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=bjH3eVf6; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752416AbcFFQgr (ORCPT ); Mon, 6 Jun 2016 12:36:47 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:34681 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752400AbcFFQgq (ORCPT ); Mon, 6 Jun 2016 12:36:46 -0400 Received: by mail-wm0-f67.google.com with SMTP id n184so17850184wmn.1 for ; Mon, 06 Jun 2016 09:36:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Cg7Xl9WGPnIhjvdZ1xPStbd6uW9de35krU//5RljlgM=; b=bjH3eVf6ZfNSd56N9uK8pORWc3jzVTMr6CeF44/RywTu1SDUeH1knuSXP9UdFldxvR 6EOkQA7pxTwoRVX8VX9SlHg/8n5DksbCiCwWZ0G4bWyxLst+jthNCkzVc/Ik2rLlNaDy cZKWQCuUd+egfNaCYD6usfFPZX5AG7lw6eWn97KqAZAHBXq/1VKEiNiKU6Bhcy6N1Noq Gsq0n+2WkaomUOhj6NAvDhAG2WcvrowDKUDgGVT68Nwxk5adHAH/51hdm1EfhOPcVXT0 y7uCHm/P2Dmid7B3Esatd0tjXqQuZfsMgLBXhkVXl+N3DP9KQrsVzjYkmXz9QR2c+BMK d0OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Cg7Xl9WGPnIhjvdZ1xPStbd6uW9de35krU//5RljlgM=; b=OtLHAvJs2VW0tMmSMAgOri5w9Y4PCQByoImTrxDnL5BFZ3hx+2IbFgfjE57w+Z9DWf cWYlx4S50l/IdmUnMPGdLCHQPADrlHNsz+TCy4UR9SNac/4WYZLUkju7OFZTvFzE2FMf SjF/tSjpOR5EPPKuYnzPKA1PdVJ1I7sgC9ETLE1B+KdEpZO5xWcqRssF0F6iErkGqhqm 0pAtQ/wiqu+MAcJMDF2PIQ83Aud5er8d05rdQm2Dpu/20zXC+EiPZAkQlw6YmuIpgfd6 gS09xatGITb7X04VD/rc4DK1ZwjoIfjRFXtgjw6U7NcqvxR073CbhnWU7QZZscshNn4U Ql/Q== X-Gm-Message-State: ALyK8tIksg0oWGmk5lJ5leKGMNxWWBm0IwOZhWq001udSaI7VhhqG8cGrqcUz/7UZ5Ve2Q== X-Received: by 10.194.89.33 with SMTP id bl1mr16346418wjb.43.1465231004782; Mon, 06 Jun 2016 09:36:44 -0700 (PDT) Received: from localhost (port-6551.pppoe.wtnet.de. [84.46.25.176]) by smtp.gmail.com with ESMTPSA id c191sm15066082wmh.5.2016.06.06.09.36.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jun 2016 09:36:43 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Alexandre Courbot , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/8] arm64: tegra: Add DSI panel on Jetson TX1 Date: Mon, 6 Jun 2016 18:36:33 +0200 Message-Id: <20160606163637.14234-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160606163637.14234-1-thierry.reding@gmail.com> References: <20160606163637.14234-1-thierry.reding@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel connected via four DSI lanes. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 45 +++++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 50 ++++++++++++++++++++++ 2 files changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 683b339a980c..983775e637a4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -6,4 +6,49 @@ / { model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; + + host1x@50000000 { + dsi@54300000 { + status = "okay"; + + avdd-dsi-csi-supply = <&vdd_dsi_csi>; + + panel@0 { + compatible = "auo,b080uan01"; + reg = <0>; + + enable-gpios = <&gpio TEGRA_GPIO(V, 2) + GPIO_ACTIVE_HIGH>; + power-supply = <&vdd_5v0_io>; + backlight = <&backlight>; + }; + }; + }; + + i2c@7000c400 { + backlight: backlight@2c { + compatible = "ti,lp8557"; + reg = <0x2c>; + + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0xff>; + + pwm-period = <29334>; + + pwms = <&pwm 0 29334>; + pwm-names = "lp8557"; + + /* 3 LED string */ + rom_14h { + rom-addr = /bits/ 8 <0x14>; + rom-val = /bits/ 8 <0x87>; + }; + + /* boost frequency 1 MHz */ + rom_13h { + rom-addr = /bits/ 8 <0x13>; + rom-val = /bits/ 8 <0x01>; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi index b28aff5e104d..78a16a57fec7 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi @@ -1261,6 +1261,23 @@ }; }; + pwm@7000a000 { + status = "okay"; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + + exp1: gpio@74 { + compatible = "ti,tca9539"; + reg = <0x74>; + + #gpio-cells = <2>; + gpio-controller; + }; + }; + /* MMC/SD */ sdhci@700b0000 { status = "okay"; @@ -1340,6 +1357,39 @@ regulator-enable-ramp-delay = <472>; regulator-disable-ramp-delay = <4880>; }; + + vdd_dsi_csi: regulator@5 { + compatible = "regulator-fixed"; + reg = <5>; + regulator-name = "AVDD_DSI_CSI_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vdd_sys_1v2>; + }; + + vdd_3v3_dis: regulator@6 { + compatible = "regulator-fixed"; + reg = <6>; + regulator-name = "VDD_DIS_3V3_LCD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; + + vdd_1v8_dis: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "VDD_LCD_1V8_DIS"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + gpio = <&exp1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_1v8>; + }; }; gpio-keys {