From patchwork Mon Jun 6 16:36:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 631014 X-Patchwork-Delegate: treding@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rNgMH6jzSz9t3Z for ; Tue, 7 Jun 2016 02:36:43 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=UgtVDrxd; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752369AbcFFQgm (ORCPT ); Mon, 6 Jun 2016 12:36:42 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:36573 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752335AbcFFQgm (ORCPT ); Mon, 6 Jun 2016 12:36:42 -0400 Received: by mail-wm0-f65.google.com with SMTP id m124so16737920wme.3 for ; Mon, 06 Jun 2016 09:36:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=9myAWLGz2/hrK3r0d9I4zZ1jnhj3BZSUyt1ZzSMAbHw=; b=UgtVDrxdhTxQBTKusKEcr4FBSr78twWG52ai6s7cs2TZI9115+Thv8Bb5DA8bUrINa 5wyutoZnT0OLkXZrpwJIC3KW3xdtKsJZemqXRx1H+nipB3jRpD09cLWIcbKVGwcdIEEd cbWU3k2glfl2STjbpXcxQGvQ3pdsUdn8D+4DbCw3to+PyR4ADE/sWeEXrMMhaHZq+SD8 yl+PQpfCfR8FKbC09Nvbm6pEebcf+37wq2rblKXK+GnDnFu7lfxqCX072GlDPLe44jo1 IUBIFcgzogScSAHAzsNpuJdwbkwGckBWSNWIqtKs/lxTxyC9OkYT5XSjB+X1j8RLYmL4 R06w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9myAWLGz2/hrK3r0d9I4zZ1jnhj3BZSUyt1ZzSMAbHw=; b=mCb+rK5jvlX4RKlMlPnnhXS7sFZwwm/dgpIx62thXVBz8cadOWqBA9tij2S69kyXBw YL94R72Tl0EPWK5jzahqNCWDVejr9yhFcj+etL1tFMAvBx2yJQQgDtnWHRpQZfCbzQiD 8d2YrhO4goiL8RMNYm5UcUeoiXhcFsLno9s6diXN5wPvb1JV+Wwzk0r07ry+HMLqkKkA nAK6hCh4mGgjfhmr+BjHSQKtvxWpEWIQ7v+dPjHl2FJSiRavx1ERWm1X8LMRljtESJ3z cvE85gOrTMc67bpwK7pKI0hEpMGBZmIT6Rs9i7sAK+LWleBwZjF2NApyIup7bk/BRce/ ov5w== X-Gm-Message-State: ALyK8tIhT+QT1LXEvO8u5TP29Nf0rOZTHtIcJiFXysL7JioZl7rKqVzypOoDN+S1ezkIBw== X-Received: by 10.28.92.20 with SMTP id q20mr13091825wmb.76.1465230999916; Mon, 06 Jun 2016 09:36:39 -0700 (PDT) Received: from localhost (port-6551.pppoe.wtnet.de. [84.46.25.176]) by smtp.gmail.com with ESMTPSA id c62sm14983690wmd.1.2016.06.06.09.36.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jun 2016 09:36:38 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Alexandre Courbot , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/8] arm64: tegra: p2180: Add PMIC support Date: Mon, 6 Jun 2016 18:36:30 +0200 Message-Id: <20160606163637.14234-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.8.3 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Signed-off-by: Thierry Reding Tested-by: Alexandre Courbot --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 245 +++++++++++++++++++++++++ 1 file changed, 245 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi index 316c92c03821..8335bbe3ab6c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -1,3 +1,5 @@ +#include + #include "tegra210.dtsi" / { @@ -5,6 +7,7 @@ compatible = "nvidia,p2180", "nvidia,tegra210"; aliases { + rtc0 = "/i2c@7000d000/pmic@3c"; rtc1 = "/rtc@7000e000"; serial0 = &uarta; }; @@ -19,6 +22,248 @@ status = "okay"; }; + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: pmic@3c { + compatible = "maxim,max77620"; + reg = <0x3c>; + interrupts = ; + + #interrupt-cells = <2>; + interrupt-controller; + + #gpio-cells = <2>; + gpio-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&max77620_default>; + + max77620_default: pinmux { + gpio0 { + pins = "gpio0"; + function = "gpio"; + }; + + gpio1 { + pins = "gpio1"; + function = "fps-out"; + drive-push-pull = <1>; + maxim,active-fps-source = ; + maxim,active-fps-power-up-slot = <7>; + maxim,active-fps-power-down-slot = <0>; + }; + + gpio2_3 { + pins = "gpio2", "gpio3"; + function = "fps-out"; + drive-open-drain = <1>; + maxim,active-fps-source = ; + }; + + gpio4 { + pins = "gpio4"; + function = "32k-out1"; + }; + + gpio5_6_7 { + pins = "gpio5", "gpio6", "gpio7"; + function = "gpio"; + drive-push-pull = <1>; + }; + }; + + fps { + fps0 { + maxim,fps-event-source = ; + maxim,suspend-fps-time-period-us = <1280>; + }; + + fps1 { + maxim,fps-event-source = ; + maxim,suspend-fps-time-period-us = <1280>; + }; + + fps2 { + maxim,fps-event-source = ; + }; + }; + + regulators { + in-ldo0-1-supply = <&vdd_pre>; + in-ldo7-8-supply = <&vdd_pre>; + in-sd3-supply = <&vdd_5v0_sys>; + + vdd_soc: sd0 { + regulator-name = "VDD_SOC"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <146>; + regulator-ramp-delay = <27500>; + + maxim,active-fps-source = ; + }; + + vdd_ddr: sd1 { + regulator-name = "VDD_DDR_1V1_PMIC"; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <130>; + regulator-ramp-delay = <27500>; + + maxim,active-fps-source = ; + }; + + vdd_pre: sd2 { + regulator-name = "VDD_PRE_REG_1V35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + + regulator-enable-ramp-delay = <176>; + regulator-ramp-delay = <27500>; + + maxim,active-fps-source = ; + }; + + vdd_1v8: sd3 { + regulator-name = "VDD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <242>; + regulator-ramp-delay = <27500>; + + maxim,active-fps-source = ; + }; + + vdd_sys_1v2: ldo0 { + regulator-name = "AVDD_SYS_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <26>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vdd_pex_1v05: ldo1 { + regulator-name = "VDD_PEX_1V05"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vddio_sdmmc: ldo2 { + regulator-name = "VDDIO_SDMMC"; + /* + * Technically this supply should have + * a supported range from 1.8 - 3.3 V. + * However, that would cause the SDHCI + * driver to request 2.7 V upon access + * and that in turn will cause traffic + * to be broken. Leave it at 3.3 V for + * now. + */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <62>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vdd_cam_hv: ldo3 { + regulator-name = "VDD_CAM_HV"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + + regulator-enable-ramp-delay = <50>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vdd_rtc: ldo4 { + regulator-name = "VDD_RTC"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vdd_ts_hv: ldo5 { + regulator-name = "VDD_TS_HV"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-enable-ramp-delay = <62>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + vdd_ts: ldo6 { + regulator-name = "VDD_TS_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-enable-ramp-delay = <36>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + maxim,active-fps-power-up-slot = <7>; + maxim,active-fps-power-down-slot = <0>; + }; + + avdd_1v05_pll: ldo7 { + regulator-name = "AVDD_1V05_PLL"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + + regulator-enable-ramp-delay = <24>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + + avdd_1v05: ldo8 { + regulator-name = "AVDD_SATA_HDMI_DP_1V05"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + + maxim,active-fps-source = ; + }; + }; + }; + }; + pmc@7000e400 { nvidia,invert-interrupt; };