diff mbox series

[V2] memory: tegra: Add MC error logging on tegra186 onward

Message ID 1642669368-20605-1-git-send-email-amhetre@nvidia.com
State Changes Requested
Headers show
Series [V2] memory: tegra: Add MC error logging on tegra186 onward | expand

Commit Message

Ashish Mhetre Jan. 20, 2022, 9:02 a.m. UTC
Remove static from tegra30_mc_handle_irq and use it as interrupt handler
for MC interrupts on tegra186, tegra194 and tegra234 to log the errors.
Add error specific MC status and address register bits and use them on
tegra186, tegra194 and tegra234.
Add error logging for generalized carveout interrupt on tegra186, tegra194
and tegra234.
Add error logging for route sanity interrupt on tegra194 an tegra234.
Add register for higher bits of error address and use it on tegra194 and
tegra234.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
Changes in v2:
- Updated patch subject and commit message
- Removed separate irq handlers
- Updated tegra30_mc_handle_irq to be used for Tegra186 onwards as well

 drivers/memory/tegra/mc.c       | 73 ++++++++++++++++++++++++++++++++++-------
 drivers/memory/tegra/mc.h       | 16 +++++++++
 drivers/memory/tegra/tegra186.c |  7 ++++
 drivers/memory/tegra/tegra194.c |  5 +++
 drivers/memory/tegra/tegra234.c |  5 +++
 5 files changed, 94 insertions(+), 12 deletions(-)

Comments

Dmitry Osipenko Jan. 20, 2022, 12:53 p.m. UTC | #1
20.01.2022 12:02, Ashish Mhetre пишет:
> Remove static from tegra30_mc_handle_irq and use it as interrupt handler
> for MC interrupts on tegra186, tegra194 and tegra234 to log the errors.
> Add error specific MC status and address register bits and use them on
> tegra186, tegra194 and tegra234.
> Add error logging for generalized carveout interrupt on tegra186, tegra194
> and tegra234.
> Add error logging for route sanity interrupt on tegra194 an tegra234.
> Add register for higher bits of error address and use it on tegra194 and
> tegra234.
> 
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
> ---
> Changes in v2:
> - Updated patch subject and commit message
> - Removed separate irq handlers
> - Updated tegra30_mc_handle_irq to be used for Tegra186 onwards as well
> 
>  drivers/memory/tegra/mc.c       | 73 ++++++++++++++++++++++++++++++++++-------
>  drivers/memory/tegra/mc.h       | 16 +++++++++
>  drivers/memory/tegra/tegra186.c |  7 ++++
>  drivers/memory/tegra/tegra194.c |  5 +++
>  drivers/memory/tegra/tegra234.c |  5 +++
>  5 files changed, 94 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
> index bf3abb6..badebe8 100644
> --- a/drivers/memory/tegra/mc.c
> +++ b/drivers/memory/tegra/mc.c
> @@ -508,7 +508,21 @@ int tegra30_mc_probe(struct tegra_mc *mc)
>  	return 0;
>  }
>  
> -static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
> +const struct tegra_mc_ops tegra30_mc_ops = {
> +	.probe = tegra30_mc_probe,
> +	.handle_irq = tegra30_mc_handle_irq,
> +};
> +#endif
> +
> +#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_114_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_124_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_132_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_210_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_186_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_234_SOC)

Ifdefs are unnecessary, please remove them. They are okay for
tegra30_mc_ops, which is known to be used only by specific older SoC
versions, not okay in case of newer SoCs.

> +irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>  {
>  	struct tegra_mc *mc = data;
>  	unsigned long status;
> @@ -521,23 +535,64 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>  
>  	for_each_set_bit(bit, &status, 32) {
>  		const char *error = tegra_mc_status_names[bit] ?: "unknown";
> +		u32 status_reg = MC_ERR_STATUS, addr_reg = MC_ERR_ADR;
>  		const char *client = "unknown", *desc;
>  		const char *direction, *secure;
>  		phys_addr_t addr = 0;
> +		u32 addr_hi_reg = 0;
>  		unsigned int i;
>  		char perm[7];
>  		u8 id, type;
>  		u32 value;
>  
> -		value = mc_readl(mc, MC_ERR_STATUS);
> +#if defined(CONFIG_ARCH_TEGRA_186_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_234_SOC)

Please drop these ifdefs.

> +		switch (bit) {
> +		case MC_INT_DECERR_VPR:
> +			status_reg = MC_ERR_VPR_STATUS;
> +			addr_reg = MC_ERR_VPR_ADR;

I mentioned previously that VPR is supported by T124+. Hence ifdefs are
incorrect.

...
> +		addr |= mc_readl(mc, addr_reg);
>  
>  		if (value & MC_ERR_STATUS_RW)
>  			direction = "write";
> @@ -591,9 +646,6 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>  			break;
>  		}
>  
> -		value = mc_readl(mc, MC_ERR_ADR);

Don't change the order of the code, just replace the MC_ERR_ADR here.

> -		addr |= value;
> -
>  		dev_err_ratelimited(mc->dev, "%s: %s%s @%pa: %s (%s%s)\n",
>  				    client, secure, direction, &addr, error,
>  				    desc, perm);
> @@ -604,11 +656,6 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>  
>  	return IRQ_HANDLED;
>  }
> -
> -const struct tegra_mc_ops tegra30_mc_ops = {
> -	.probe = tegra30_mc_probe,
> -	.handle_irq = tegra30_mc_handle_irq,
> -};
>  #endif
>  
>  const char *const tegra_mc_status_names[32] = {
> @@ -622,6 +669,8 @@ const char *const tegra_mc_status_names[32] = {
>  	[12] = "VPR violation",
>  	[13] = "Secure carveout violation",
>  	[16] = "MTS carveout violation",
> +	[17] = "Generalized carveout violation",
> +	[20] = "Route Sanity error",
>  };
>  
>  const char *const tegra_mc_error_names[8] = {
> diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
> index 062886e..9b1b0dc 100644
> --- a/drivers/memory/tegra/mc.h
> +++ b/drivers/memory/tegra/mc.h
> @@ -44,6 +44,8 @@
>  #define MC_TIMING_CONTROL_DBG				0xf8
>  #define MC_TIMING_CONTROL				0xfc
>  
> +#define MC_INT_DECERR_ROUTE_SANITY			BIT(20)
> +#define MC_INT_DECERR_GENERALIZED_CARVEOUT		BIT(17)
>  #define MC_INT_DECERR_MTS				BIT(16)
>  #define MC_INT_SECERR_SEC				BIT(13)
>  #define MC_INT_DECERR_VPR				BIT(12)
> @@ -65,6 +67,18 @@
>  #define MC_ERR_STATUS_SECURITY				BIT(17)
>  #define MC_ERR_STATUS_RW				BIT(16)
>  
> +#define MC_ERR_VPR_STATUS				0x654
> +#define MC_ERR_VPR_ADR					0x658
> +#define MC_ERR_SEC_STATUS				0x67c
> +#define MC_ERR_SEC_ADR					0x680
> +#define MC_ERR_MTS_STATUS				0x9b0
> +#define MC_ERR_MTS_ADR					0x9b4
> +#define MC_ERR_ROUTE_SANITY_STATUS			0x9c0
> +#define MC_ERR_ROUTE_SANITY_ADR				0x9c4
> +#define MC_ERR_GENERALIZED_CARVEOUT_STATUS		0xc00
> +#define MC_ERR_GENERALIZED_CARVEOUT_ADR			0xc04
> +#define MC_ERR_ADR_HI					0x11fc

Please put these regs right after the MC_TIMING_CONTROL. There is no
reason to separate them.
Dmitry Osipenko Jan. 20, 2022, 12:59 p.m. UTC | #2
20.01.2022 12:02, Ashish Mhetre пишет:
> @@ -521,23 +535,64 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>  
>  	for_each_set_bit(bit, &status, 32) {
>  		const char *error = tegra_mc_status_names[bit] ?: "unknown";
> +		u32 status_reg = MC_ERR_STATUS, addr_reg = MC_ERR_ADR;

No need to initialize these variables, since they are always initialized
by the further code.

Please write it like this:

u32 addr_hi_reg = 0, status_reg, addr_reg;
Dmitry Osipenko Jan. 20, 2022, 1:06 p.m. UTC | #3
20.01.2022 12:02, Ashish Mhetre пишет:
> +		default:
> +			status_reg = MC_ERR_STATUS;
> +			addr_reg = MC_ERR_ADR;
> +#if defined(CONFIG_ARCH_TEGRA_194_SOC) || \
> +    defined(CONFIG_ARCH_TEGRA_234_SOC)
> +			addr_hi_reg = MC_ERR_ADR_HI;
> +#endif

I'd add new "has_addr_hi_reg" field to struct tegra_mc_soc and use it
instead of the ifdefs.

if (mc->soc->has_addr_hi_reg)
	addr_hi_reg = MC_ERR_ADR_HI;
Ashish Mhetre Jan. 21, 2022, 5:50 a.m. UTC | #4
On 1/20/2022 6:23 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> 20.01.2022 12:02, Ashish Mhetre пишет:
>> Remove static from tegra30_mc_handle_irq and use it as interrupt handler
>> for MC interrupts on tegra186, tegra194 and tegra234 to log the errors.
>> Add error specific MC status and address register bits and use them on
>> tegra186, tegra194 and tegra234.
>> Add error logging for generalized carveout interrupt on tegra186, tegra194
>> and tegra234.
>> Add error logging for route sanity interrupt on tegra194 an tegra234.
>> Add register for higher bits of error address and use it on tegra194 and
>> tegra234.
>>
>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
>> ---
>> Changes in v2:
>> - Updated patch subject and commit message
>> - Removed separate irq handlers
>> - Updated tegra30_mc_handle_irq to be used for Tegra186 onwards as well
>>
>>   drivers/memory/tegra/mc.c       | 73 ++++++++++++++++++++++++++++++++++-------
>>   drivers/memory/tegra/mc.h       | 16 +++++++++
>>   drivers/memory/tegra/tegra186.c |  7 ++++
>>   drivers/memory/tegra/tegra194.c |  5 +++
>>   drivers/memory/tegra/tegra234.c |  5 +++
>>   5 files changed, 94 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
>> index bf3abb6..badebe8 100644
>> --- a/drivers/memory/tegra/mc.c
>> +++ b/drivers/memory/tegra/mc.c
>> @@ -508,7 +508,21 @@ int tegra30_mc_probe(struct tegra_mc *mc)
>>        return 0;
>>   }
>>
>> -static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>> +const struct tegra_mc_ops tegra30_mc_ops = {
>> +     .probe = tegra30_mc_probe,
>> +     .handle_irq = tegra30_mc_handle_irq,
>> +};
>> +#endif
>> +
>> +#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_114_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_124_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_132_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_210_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_186_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_234_SOC)
> 
> Ifdefs are unnecessary, please remove them. They are okay for
> tegra30_mc_ops, which is known to be used only by specific older SoC
> versions, not okay in case of newer SoCs.
> 
Okay, I'll remove these ifdefs in next version.

>> +irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>   {
>>        struct tegra_mc *mc = data;
>>        unsigned long status;
>> @@ -521,23 +535,64 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>
>>        for_each_set_bit(bit, &status, 32) {
>>                const char *error = tegra_mc_status_names[bit] ?: "unknown";
>> +             u32 status_reg = MC_ERR_STATUS, addr_reg = MC_ERR_ADR;
>>                const char *client = "unknown", *desc;
>>                const char *direction, *secure;
>>                phys_addr_t addr = 0;
>> +             u32 addr_hi_reg = 0;
>>                unsigned int i;
>>                char perm[7];
>>                u8 id, type;
>>                u32 value;
>>
>> -             value = mc_readl(mc, MC_ERR_STATUS);
>> +#if defined(CONFIG_ARCH_TEGRA_186_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_234_SOC)
> 
> Please drop these ifdefs.
> 
Yes, will do in next version.
>> +             switch (bit) {
>> +             case MC_INT_DECERR_VPR:
>> +                     status_reg = MC_ERR_VPR_STATUS;
>> +                     addr_reg = MC_ERR_VPR_ADR;
> 
> I mentioned previously that VPR is supported by T124+. Hence ifdefs are
> incorrect.
> 
Yes, I will remove them.

> ...
>> +             addr |= mc_readl(mc, addr_reg);
>>
>>                if (value & MC_ERR_STATUS_RW)
>>                        direction = "write";
>> @@ -591,9 +646,6 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>                        break;
>>                }
>>
>> -             value = mc_readl(mc, MC_ERR_ADR);
> 
> Don't change the order of the code, just replace the MC_ERR_ADR here.
> 
Okay, I'll keep the order as it is. I just thought that higher bits of
address are read above, so why not read lower bits after that.

>> -             addr |= value;
>> -
>>                dev_err_ratelimited(mc->dev, "%s: %s%s @%pa: %s (%s%s)\n",
>>                                    client, secure, direction, &addr, error,
>>                                    desc, perm);
>> @@ -604,11 +656,6 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>
>>        return IRQ_HANDLED;
>>   }
>> -
>> -const struct tegra_mc_ops tegra30_mc_ops = {
>> -     .probe = tegra30_mc_probe,
>> -     .handle_irq = tegra30_mc_handle_irq,
>> -};
>>   #endif
>>
>>   const char *const tegra_mc_status_names[32] = {
>> @@ -622,6 +669,8 @@ const char *const tegra_mc_status_names[32] = {
>>        [12] = "VPR violation",
>>        [13] = "Secure carveout violation",
>>        [16] = "MTS carveout violation",
>> +     [17] = "Generalized carveout violation",
>> +     [20] = "Route Sanity error",
>>   };
>>
>>   const char *const tegra_mc_error_names[8] = {
>> diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
>> index 062886e..9b1b0dc 100644
>> --- a/drivers/memory/tegra/mc.h
>> +++ b/drivers/memory/tegra/mc.h
>> @@ -44,6 +44,8 @@
>>   #define MC_TIMING_CONTROL_DBG                                0xf8
>>   #define MC_TIMING_CONTROL                            0xfc
>>
>> +#define MC_INT_DECERR_ROUTE_SANITY                   BIT(20)
>> +#define MC_INT_DECERR_GENERALIZED_CARVEOUT           BIT(17)
>>   #define MC_INT_DECERR_MTS                            BIT(16)
>>   #define MC_INT_SECERR_SEC                            BIT(13)
>>   #define MC_INT_DECERR_VPR                            BIT(12)
>> @@ -65,6 +67,18 @@
>>   #define MC_ERR_STATUS_SECURITY                               BIT(17)
>>   #define MC_ERR_STATUS_RW                             BIT(16)
>>
>> +#define MC_ERR_VPR_STATUS                            0x654
>> +#define MC_ERR_VPR_ADR                                       0x658
>> +#define MC_ERR_SEC_STATUS                            0x67c
>> +#define MC_ERR_SEC_ADR                                       0x680
>> +#define MC_ERR_MTS_STATUS                            0x9b0
>> +#define MC_ERR_MTS_ADR                                       0x9b4
>> +#define MC_ERR_ROUTE_SANITY_STATUS                   0x9c0
>> +#define MC_ERR_ROUTE_SANITY_ADR                              0x9c4
>> +#define MC_ERR_GENERALIZED_CARVEOUT_STATUS           0xc00
>> +#define MC_ERR_GENERALIZED_CARVEOUT_ADR                      0xc04
>> +#define MC_ERR_ADR_HI                                        0x11fc
> 
> Please put these regs right after the MC_TIMING_CONTROL. There is no
> reason to separate them.
> 
Sure, I'll update it in next version.
Ashish Mhetre Jan. 21, 2022, 5:51 a.m. UTC | #5
On 1/20/2022 6:29 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> 20.01.2022 12:02, Ashish Mhetre пишет:
>> @@ -521,23 +535,64 @@ static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
>>
>>        for_each_set_bit(bit, &status, 32) {
>>                const char *error = tegra_mc_status_names[bit] ?: "unknown";
>> +             u32 status_reg = MC_ERR_STATUS, addr_reg = MC_ERR_ADR;
> 
> No need to initialize these variables, since they are always initialized
> by the further code.
> 
> Please write it like this:
> 
> u32 addr_hi_reg = 0, status_reg, addr_reg;
Okay, I will remove initialization.
Ashish Mhetre Jan. 21, 2022, 5:52 a.m. UTC | #6
On 1/20/2022 6:36 PM, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
> 
> 
> 20.01.2022 12:02, Ashish Mhetre пишет:
>> +             default:
>> +                     status_reg = MC_ERR_STATUS;
>> +                     addr_reg = MC_ERR_ADR;
>> +#if defined(CONFIG_ARCH_TEGRA_194_SOC) || \
>> +    defined(CONFIG_ARCH_TEGRA_234_SOC)
>> +                     addr_hi_reg = MC_ERR_ADR_HI;
>> +#endif
> 
> I'd add new "has_addr_hi_reg" field to struct tegra_mc_soc and use it
> instead of the ifdefs.
> 
> if (mc->soc->has_addr_hi_reg)
>          addr_hi_reg = MC_ERR_ADR_HI;
That's a good idea. I'll implement it in that way in next version.
diff mbox series

Patch

diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index bf3abb6..badebe8 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -508,7 +508,21 @@  int tegra30_mc_probe(struct tegra_mc *mc)
 	return 0;
 }
 
-static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
+const struct tegra_mc_ops tegra30_mc_ops = {
+	.probe = tegra30_mc_probe,
+	.handle_irq = tegra30_mc_handle_irq,
+};
+#endif
+
+#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_114_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_124_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_132_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_210_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_186_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_234_SOC)
+irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
 {
 	struct tegra_mc *mc = data;
 	unsigned long status;
@@ -521,23 +535,64 @@  static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
 
 	for_each_set_bit(bit, &status, 32) {
 		const char *error = tegra_mc_status_names[bit] ?: "unknown";
+		u32 status_reg = MC_ERR_STATUS, addr_reg = MC_ERR_ADR;
 		const char *client = "unknown", *desc;
 		const char *direction, *secure;
 		phys_addr_t addr = 0;
+		u32 addr_hi_reg = 0;
 		unsigned int i;
 		char perm[7];
 		u8 id, type;
 		u32 value;
 
-		value = mc_readl(mc, MC_ERR_STATUS);
+#if defined(CONFIG_ARCH_TEGRA_186_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_194_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_234_SOC)
+		switch (bit) {
+		case MC_INT_DECERR_VPR:
+			status_reg = MC_ERR_VPR_STATUS;
+			addr_reg = MC_ERR_VPR_ADR;
+			break;
+		case MC_INT_SECERR_SEC:
+			status_reg = MC_ERR_SEC_STATUS;
+			addr_reg = MC_ERR_SEC_ADR;
+			break;
+		case MC_INT_DECERR_MTS:
+			status_reg = MC_ERR_MTS_STATUS;
+			addr_reg = MC_ERR_MTS_ADR;
+			break;
+		case MC_INT_DECERR_GENERALIZED_CARVEOUT:
+			status_reg = MC_ERR_GENERALIZED_CARVEOUT_STATUS;
+			addr_reg = MC_ERR_GENERALIZED_CARVEOUT_ADR;
+			break;
+		case MC_INT_DECERR_ROUTE_SANITY:
+			status_reg = MC_ERR_ROUTE_SANITY_STATUS;
+			addr_reg = MC_ERR_ROUTE_SANITY_ADR;
+			break;
+		default:
+			status_reg = MC_ERR_STATUS;
+			addr_reg = MC_ERR_ADR;
+#if defined(CONFIG_ARCH_TEGRA_194_SOC) || \
+    defined(CONFIG_ARCH_TEGRA_234_SOC)
+			addr_hi_reg = MC_ERR_ADR_HI;
+#endif
+			break;
+		}
+#endif
+
+		value = mc_readl(mc, status_reg);
 
 #ifdef CONFIG_PHYS_ADDR_T_64BIT
 		if (mc->soc->num_address_bits > 32) {
-			addr = ((value >> MC_ERR_STATUS_ADR_HI_SHIFT) &
-				MC_ERR_STATUS_ADR_HI_MASK);
+			if (addr_hi_reg)
+				addr = mc_readl(mc, addr_hi_reg);
+			else
+				addr = ((value >> MC_ERR_STATUS_ADR_HI_SHIFT) &
+					MC_ERR_STATUS_ADR_HI_MASK);
 			addr <<= 32;
 		}
 #endif
+		addr |= mc_readl(mc, addr_reg);
 
 		if (value & MC_ERR_STATUS_RW)
 			direction = "write";
@@ -591,9 +646,6 @@  static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
 			break;
 		}
 
-		value = mc_readl(mc, MC_ERR_ADR);
-		addr |= value;
-
 		dev_err_ratelimited(mc->dev, "%s: %s%s @%pa: %s (%s%s)\n",
 				    client, secure, direction, &addr, error,
 				    desc, perm);
@@ -604,11 +656,6 @@  static irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
 
 	return IRQ_HANDLED;
 }
-
-const struct tegra_mc_ops tegra30_mc_ops = {
-	.probe = tegra30_mc_probe,
-	.handle_irq = tegra30_mc_handle_irq,
-};
 #endif
 
 const char *const tegra_mc_status_names[32] = {
@@ -622,6 +669,8 @@  const char *const tegra_mc_status_names[32] = {
 	[12] = "VPR violation",
 	[13] = "Secure carveout violation",
 	[16] = "MTS carveout violation",
+	[17] = "Generalized carveout violation",
+	[20] = "Route Sanity error",
 };
 
 const char *const tegra_mc_error_names[8] = {
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index 062886e..9b1b0dc 100644
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -44,6 +44,8 @@ 
 #define MC_TIMING_CONTROL_DBG				0xf8
 #define MC_TIMING_CONTROL				0xfc
 
+#define MC_INT_DECERR_ROUTE_SANITY			BIT(20)
+#define MC_INT_DECERR_GENERALIZED_CARVEOUT		BIT(17)
 #define MC_INT_DECERR_MTS				BIT(16)
 #define MC_INT_SECERR_SEC				BIT(13)
 #define MC_INT_DECERR_VPR				BIT(12)
@@ -65,6 +67,18 @@ 
 #define MC_ERR_STATUS_SECURITY				BIT(17)
 #define MC_ERR_STATUS_RW				BIT(16)
 
+#define MC_ERR_VPR_STATUS				0x654
+#define MC_ERR_VPR_ADR					0x658
+#define MC_ERR_SEC_STATUS				0x67c
+#define MC_ERR_SEC_ADR					0x680
+#define MC_ERR_MTS_STATUS				0x9b0
+#define MC_ERR_MTS_ADR					0x9b4
+#define MC_ERR_ROUTE_SANITY_STATUS			0x9c0
+#define MC_ERR_ROUTE_SANITY_ADR				0x9c4
+#define MC_ERR_GENERALIZED_CARVEOUT_STATUS		0xc00
+#define MC_ERR_GENERALIZED_CARVEOUT_ADR			0xc04
+#define MC_ERR_ADR_HI					0x11fc
+
 #define MC_EMEM_ADR_CFG_EMEM_NUMDEV			BIT(0)
 
 #define MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(x)		((x) & 0x1ff)
@@ -147,12 +161,14 @@  extern const struct tegra_mc_soc tegra234_mc_soc;
     defined(CONFIG_ARCH_TEGRA_132_SOC) || \
     defined(CONFIG_ARCH_TEGRA_210_SOC)
 int tegra30_mc_probe(struct tegra_mc *mc);
+irqreturn_t tegra30_mc_handle_irq(int irq, void *data);
 extern const struct tegra_mc_ops tegra30_mc_ops;
 #endif
 
 #if defined(CONFIG_ARCH_TEGRA_186_SOC) || \
     defined(CONFIG_ARCH_TEGRA_194_SOC) || \
     defined(CONFIG_ARCH_TEGRA_234_SOC)
+irqreturn_t tegra30_mc_handle_irq(int irq, void *data);
 extern const struct tegra_mc_ops tegra186_mc_ops;
 #endif
 
diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c
index 3d15388..a619e6c 100644
--- a/drivers/memory/tegra/tegra186.c
+++ b/drivers/memory/tegra/tegra186.c
@@ -16,6 +16,8 @@ 
 #include <dt-bindings/memory/tegra186-mc.h>
 #endif
 
+#include "mc.h"
+
 #define MC_SID_STREAMID_OVERRIDE_MASK GENMASK(7, 0)
 #define MC_SID_STREAMID_SECURITY_WRITE_ACCESS_DISABLED BIT(16)
 #define MC_SID_STREAMID_SECURITY_OVERRIDE BIT(8)
@@ -144,6 +146,7 @@  const struct tegra_mc_ops tegra186_mc_ops = {
 	.remove = tegra186_mc_remove,
 	.resume = tegra186_mc_resume,
 	.probe_device = tegra186_mc_probe_device,
+	.handle_irq = tegra30_mc_handle_irq,
 };
 
 #if defined(CONFIG_ARCH_TEGRA_186_SOC)
@@ -875,6 +878,10 @@  const struct tegra_mc_soc tegra186_mc_soc = {
 	.num_clients = ARRAY_SIZE(tegra186_mc_clients),
 	.clients = tegra186_mc_clients,
 	.num_address_bits = 40,
+	.client_id_mask = 0xff,
+	.intmask = MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
+		   MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 	.ops = &tegra186_mc_ops,
 };
 #endif
diff --git a/drivers/memory/tegra/tegra194.c b/drivers/memory/tegra/tegra194.c
index cab998b..6f622d7 100644
--- a/drivers/memory/tegra/tegra194.c
+++ b/drivers/memory/tegra/tegra194.c
@@ -1347,5 +1347,10 @@  const struct tegra_mc_soc tegra194_mc_soc = {
 	.num_clients = ARRAY_SIZE(tegra194_mc_clients),
 	.clients = tegra194_mc_clients,
 	.num_address_bits = 40,
+	.client_id_mask = 0xff,
+	.intmask = MC_INT_DECERR_ROUTE_SANITY |
+		   MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
+		   MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 	.ops = &tegra186_mc_ops,
 };
diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c
index 45efc51..cddb764 100644
--- a/drivers/memory/tegra/tegra234.c
+++ b/drivers/memory/tegra/tegra234.c
@@ -77,5 +77,10 @@  const struct tegra_mc_soc tegra234_mc_soc = {
 	.num_clients = ARRAY_SIZE(tegra234_mc_clients),
 	.clients = tegra234_mc_clients,
 	.num_address_bits = 40,
+	.client_id_mask = 0xff,
+	.intmask = MC_INT_DECERR_ROUTE_SANITY |
+		   MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
+		   MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 	.ops = &tegra186_mc_ops,
 };