diff mbox series

[V1,2/4] memory: tegra: Add interrupt mask

Message ID 1641926750-27544-3-git-send-email-amhetre@nvidia.com
State Changes Requested
Headers show
Series memory: tegra: Update mc interrupts | expand

Commit Message

Ashish Mhetre Jan. 11, 2022, 6:45 p.m. UTC
Add interrupt masks for all supported interrupts on tegra MCs.
Update interrupt mask value for T186 and T194 as per supported interrupts.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
 drivers/memory/tegra/mc.h       | 4 ++++
 drivers/memory/tegra/tegra186.c | 4 ++++
 drivers/memory/tegra/tegra194.c | 4 ++++
 3 files changed, 12 insertions(+)

Comments

Krzysztof Kozlowski Jan. 11, 2022, 8:32 p.m. UTC | #1
On 11/01/2022 19:45, Ashish Mhetre wrote:
> Add interrupt masks for all supported interrupts on tegra MCs.
> Update interrupt mask value for T186 and T194 as per supported interrupts.

The commit subject is too generic. The commit description need to also
describe why you are doing it and what you want achieve.



Best regards,
Krzysztof
Ashish Mhetre Jan. 19, 2022, 7:38 a.m. UTC | #2
On 1/12/2022 2:02 AM, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
> 
> 
> On 11/01/2022 19:45, Ashish Mhetre wrote:
>> Add interrupt masks for all supported interrupts on tegra MCs.
>> Update interrupt mask value for T186 and T194 as per supported interrupts.
> 
> The commit subject is too generic. The commit description need to also
> describe why you are doing it and what you want achieve.
> 
> 
> 
> Best regards,
> Krzysztof
Sure, I'll update the commit message.
diff mbox series

Patch

diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index f1fd457..2d4f495 100644
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -44,6 +44,10 @@ 
 #define MC_TIMING_CONTROL_DBG				0xf8
 #define MC_TIMING_CONTROL				0xfc
 
+#define MC_INT_DECERR_ROUTE_SANITY			BIT(20)
+#define MC_INT_WCAM_ERR					BIT(19)
+#define MC_INT_SCRUB_ECC_WR_ACK				BIT(18)
+#define MC_INT_DECERR_GENERALIZED_CARVEOUT		BIT(17)
 #define MC_INT_DECERR_MTS				BIT(16)
 #define MC_INT_SECERR_SEC				BIT(13)
 #define MC_INT_DECERR_VPR				BIT(12)
diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c
index b548b6a..6766cc4 100644
--- a/drivers/memory/tegra/tegra186.c
+++ b/drivers/memory/tegra/tegra186.c
@@ -886,6 +886,10 @@  const struct tegra_mc_soc tegra186_mc_soc = {
 	.num_clients = ARRAY_SIZE(tegra186_mc_clients),
 	.clients = tegra186_mc_clients,
 	.num_address_bits = 40,
+	.intmask = MC_INT_WCAM_ERR | MC_INT_SCRUB_ECC_WR_ACK |
+		   MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
+		   MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 	.ops = &tegra186_mc_ops,
 	.interrupt_ops = &tegra186_mc_interrupt_ops,
 };
diff --git a/drivers/memory/tegra/tegra194.c b/drivers/memory/tegra/tegra194.c
index 19f135f..76ba3da 100644
--- a/drivers/memory/tegra/tegra194.c
+++ b/drivers/memory/tegra/tegra194.c
@@ -1358,6 +1358,10 @@  const struct tegra_mc_soc tegra194_mc_soc = {
 	.num_clients = ARRAY_SIZE(tegra194_mc_clients),
 	.clients = tegra194_mc_clients,
 	.num_address_bits = 40,
+	.intmask = MC_INT_DECERR_ROUTE_SANITY | MC_INT_WCAM_ERR |
+		   MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
+		   MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
+		   MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 	.ops = &tegra186_mc_ops,
 	.interrupt_ops = &tegra194_mc_interrupt_ops,
 };