| Message ID | 1596673949-1571-5-git-send-email-skomatineni@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Fix timeout clock used by hardware data timeout | expand |
Hi
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This commit has been processed because it contains a "Fixes:" tag
fixing commit: 39cb62cb8973 ("arm64: tegra: Add Tegra186 support").
The bot has tested the following trees: v5.8.1, v5.7.15, v5.4.58, v4.19.139, v4.14.193.
v5.8.1: Build OK!
v5.7.15: Build OK!
v5.4.58: Build OK!
v4.19.139: Failed to apply! Possible dependencies:
05705c721591 ("arm64: tegra: Enable SMMU for XUSB host on Tegra186")
06c6b06f8908 ("arm64: tegra: Make XUSB node consistent with the rest")
24005fd1b3b4 ("arm64: dts: Add Tegra186 sdmmc pinctrl voltage states")
29ef1f4dacb5 ("arm64: tegra: Enable SMMU for VIC on Tegra186")
31af04cd60d3 ("arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string")
3f6eaef9ab37 ("arm64: tegra: Add external memory controller on Tegra186")
41408c215ab7 ("arm64: dts: tegra186: Add sdmmc pad auto calibration offsets")
5298166d47a6 ("arm64: tegra: Add CPU cache topology for Tegra186")
541d7c44069b ("arm64: tegra: Sort device tree nodes alphabetically")
5d2249dda08e ("arm64: tegra: Add ACONNECT, ADMA and AGIC nodes")
6f90c6f0db83 ("arm64: dts: tegra186: Add SDHCI tap and trim values")
8589a649d5f9 ("arm64: dts: tegra186: Enable IOMMU for SDHCI")
8bfde5183e98 ("arm64: tegra: Add XUSB and pad controller on Tegra186")
954490b30cb4 ("arm64: tegra: Describe interconnect paths on Tegra186")
98a2494f847c ("arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4")
9c8c52f7cb4f ("arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support")
b066a31040b7 ("arm64: tegra: Add HDA controller on Tegra186")
b72d52a1b60b ("arm64: tegra: Add interrupt for memory controller on Tegra186")
dfdbf16c50d8 ("arm64: tegra: Fix insecure SMMU users for Tegra186")
f2a465e7185f ("arm64: tegra: Enable SMMU translation for PCI on Tegra186")
v4.14.193: Failed to apply! Possible dependencies:
15274c232131 ("arm64: tegra: Add BPMP thermal sensor to Tegra186")
24005fd1b3b4 ("arm64: dts: Add Tegra186 sdmmc pinctrl voltage states")
3f6eaef9ab37 ("arm64: tegra: Add external memory controller on Tegra186")
41408c215ab7 ("arm64: dts: tegra186: Add sdmmc pad auto calibration offsets")
5425fb15d8ee ("arm64: tegra: Add Tegra194 chip device tree")
5d2249dda08e ("arm64: tegra: Add ACONNECT, ADMA and AGIC nodes")
6f90c6f0db83 ("arm64: dts: tegra186: Add SDHCI tap and trim values")
85593b75ee71 ("arm64: tegra: Add FUSE block on Tegra186")
8589a649d5f9 ("arm64: dts: tegra186: Enable IOMMU for SDHCI")
954490b30cb4 ("arm64: tegra: Describe interconnect paths on Tegra186")
98a2494f847c ("arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4")
b066a31040b7 ("arm64: tegra: Add HDA controller on Tegra186")
b72d52a1b60b ("arm64: tegra: Add interrupt for memory controller on Tegra186")
b8656c673a6b ("arm64: tegra: Add device tree for the Tegra194 P2972-0000 board")
d25a3bf11fc9 ("arm64: tegra: Add memory controller on Tegra186")
dfdbf16c50d8 ("arm64: tegra: Fix insecure SMMU users for Tegra186")
f69ce393ec48 ("arm64: tegra: Add GPIO controller on Tegra194")
f89b58ce71a9 ("arm64: tegra: Add ethernet controller on Tegra194")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 34d249d..8eb61dd 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -337,8 +337,9 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03400000 0x0 0x10000>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bpmp TEGRA186_CLK_SDMMC1>; - clock-names = "sdhci"; + clocks = <&bpmp TEGRA186_CLK_SDMMC1>, + <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>; + clock-names = "sdhci", "tmclk"; resets = <&bpmp TEGRA186_RESET_SDMMC1>; reset-names = "sdhci"; interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>, @@ -366,8 +367,9 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03420000 0x0 0x10000>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bpmp TEGRA186_CLK_SDMMC2>; - clock-names = "sdhci"; + clocks = <&bpmp TEGRA186_CLK_SDMMC2>, + <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>; + clock-names = "sdhci", "tmclk"; resets = <&bpmp TEGRA186_RESET_SDMMC2>; reset-names = "sdhci"; interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>, @@ -390,8 +392,9 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03440000 0x0 0x10000>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bpmp TEGRA186_CLK_SDMMC3>; - clock-names = "sdhci"; + clocks = <&bpmp TEGRA186_CLK_SDMMC3>, + <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>; + clock-names = "sdhci", "tmclk"; resets = <&bpmp TEGRA186_RESET_SDMMC3>; reset-names = "sdhci"; interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>, @@ -416,8 +419,9 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03460000 0x0 0x10000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bpmp TEGRA186_CLK_SDMMC4>; - clock-names = "sdhci"; + clocks = <&bpmp TEGRA186_CLK_SDMMC4>, + <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>; + clock-names = "sdhci", "tmclk"; assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>, <&bpmp TEGRA186_CLK_PLLC4_VCO>; assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
commit 39cb62cb8973 ("arm64: tegra: Add Tegra186 support") Tegra186 uses separate SDMMC_LEGACY_TM clock for data timeout and this clock is not enabled currently which is not recommended. Tegra186 SDMMC advertises 12Mhz as timeout clock frequency in host capability register and uses it by default. So, this clock should be kept enabled by the SDMMC driver. Fixes: 39cb62cb8973 ("arm64: tegra: Add Tegra186 support") Cc: stable <stable@vger.kernel.org> # 5.4 Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)