From patchwork Sun Jul 19 05:01:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sameer Pujar X-Patchwork-Id: 1331661 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=nda5lJUh; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B8Xm75K0zz9sTC for ; Sun, 19 Jul 2020 15:02:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726255AbgGSFCa (ORCPT ); Sun, 19 Jul 2020 01:02:30 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:4455 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725440AbgGSFCa (ORCPT ); Sun, 19 Jul 2020 01:02:30 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Sat, 18 Jul 2020 22:01:29 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Sat, 18 Jul 2020 22:02:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Sat, 18 Jul 2020 22:02:29 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Sun, 19 Jul 2020 05:02:29 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Sun, 19 Jul 2020 05:02:29 +0000 Received: from audio.nvidia.com (Not Verified[10.24.34.185]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Sat, 18 Jul 2020 22:02:29 -0700 From: Sameer Pujar To: , , , , , CC: , , , , , , , , , , , , , , , Sameer Pujar Subject: [PATCH v5 09/11] arm64: defconfig: Build ADMA and ACONNECT driver Date: Sun, 19 Jul 2020 10:31:28 +0530 Message-ID: <1595134890-16470-10-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595134890-16470-1-git-send-email-spujar@nvidia.com> References: <1595134890-16470-1-git-send-email-spujar@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1595134889; bh=ib3U7Vm7ufz0JpNg27la6nszO6b1ud/ZdmXtMNpwaT8=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=nda5lJUhcb0XM4EQwtgUbuzVqjAZ1YrrPogJheDGfpUyw7jC5+ie7KegDewf8xFoD XnnzsvV8Qp4VuvBB65VzF7m/Esd4S8fFM6YPjgrI0qM7I3JtD7Gqozp4fW1fehD+RA vF+qYwbuApWyB21JYSxiBFAXmv3CFIhccEukOsAGn+xyQqL22A7ZXbCFvyWDSTbgHs yAzBT9OwvZUZzaz/N7AveMdiJgSuc2F7RDq6T1ex89kVJfOutGGTBWs/1zS8bBZVax NHAoS8bQjYfdESi1g8SpJp5uB4yJNQ/ylc3UU6omwOoK/dgfkZNURzJYhjJIX4ukPq Ys7D7tXCVUg4g== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This commit builds ADMA and ACONNECT drivers which can be used on Tegra210 and later platforms to transfer audio data to/from AHUB (Audio Hub). Signed-off-by: Sameer Pujar Reviewed-by: Jon Hunter --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4976e1a..7bc093a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -219,6 +219,7 @@ CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y CONFIG_HISILICON_LPC=y CONFIG_SIMPLE_PM_BUS=y CONFIG_FSL_MC_BUS=y +CONFIG_TEGRA_ACONNECT=m CONFIG_MTD=y CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y @@ -788,6 +789,7 @@ CONFIG_MV_XOR_V2=y CONFIG_OWL_DMA=y CONFIG_PL330_DMA=y CONFIG_TEGRA20_APB_DMA=y +CONFIG_TEGRA210_ADMA=m CONFIG_QCOM_BAM_DMA=y CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y