Message ID | 1575600535-26877-5-git-send-email-skomatineni@nvidia.com |
---|---|
State | Changes Requested |
Headers | show
Return-Path: <linux-tegra-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="RZ86f6Pc"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47TcWP3GLNz9sPn for <incoming@patchwork.ozlabs.org>; Fri, 6 Dec 2019 13:49:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726640AbfLFCtF (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Thu, 5 Dec 2019 21:49:05 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:15954 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726599AbfLFCtF (ORCPT <rfc822; linux-tegra@vger.kernel.org>); Thu, 5 Dec 2019 21:49:05 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id <B5de9c18f0002>; Thu, 05 Dec 2019 18:48:48 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 05 Dec 2019 18:49:04 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 05 Dec 2019 18:49:04 -0800 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 6 Dec 2019 02:49:03 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 6 Dec 2019 02:49:03 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.163.171]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id <B5de9c19e0000>; Thu, 05 Dec 2019 18:49:03 -0800 From: Sowjanya Komatineni <skomatineni@nvidia.com> To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <digetx@gmail.com>, <mperttunen@nvidia.com>, <gregkh@linuxfoundation.org>, <sboyd@kernel.org>, <tglx@linutronix.de>, <robh+dt@kernel.org>, <mark.rutland@arm.com> CC: <allison@lohutok.net>, <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>, <mturquette@baylibre.com>, <horms+renesas@verge.net.au>, <Jisheng.Zhang@synaptics.com>, <krzk@kernel.org>, <arnd@arndb.de>, <spujar@nvidia.com>, <josephl@nvidia.com>, <vidyas@nvidia.com>, <daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>, <markz@nvidia.com>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <perex@perex.cz>, <tiwai@suse.com>, <alexios.zavras@intel.com>, <alsa-devel@alsa-project.org> Subject: [PATCH v3 04/15] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC blink control Date: Thu, 5 Dec 2019 18:48:44 -0800 Message-ID: <1575600535-26877-5-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575600535-26877-1-git-send-email-skomatineni@nvidia.com> References: <1575600535-26877-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1575600528; bh=63eFiSPz4MqupbpIiCdG57XX3PH0P9e9XUqT1iGtGIk=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=RZ86f6Pcz2o8OxuW6Ta0VXgzvDiuN9OOtLf7ayKm3fd44XcKmIbuwLIRR+4mwx2Mo uYxJ2xZeUYaIQQrQ+07MgTiyNiq7iFOLgbISI011gHGwZVZ+NT2CX85Jf1JRICZUgq 6EORgYudLtHyQ4LdAkpAq7pBhtAXHYLTB8J2/b8mgsfGC97gSYs2/8YHCbwrNpnWfE ggFbGvizvbE33J91+1ugKAwewrArnNLDbsL1ynuUAxnEKC96EagTiRm6PZb6jpscHF RUgC30UIApQ1DtQZuKGMvUDENIW5rY7dql1/YVU5sBjBYUnm7w38E1sVgSrS6iFK4Y eEr9PoP57iLPg== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: <linux-tegra.vger.kernel.org> X-Mailing-List: linux-tegra@vger.kernel.org |
Series |
Move PMC clocks into Tegra PMC driver
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diff --git a/include/dt-bindings/soc/tegra-pmc.h b/include/dt-bindings/soc/tegra-pmc.h index 705ee8083070..6fe28516017e 100644 --- a/include/dt-bindings/soc/tegra-pmc.h +++ b/include/dt-bindings/soc/tegra-pmc.h @@ -12,7 +12,8 @@ #define TEGRA_PMC_CLK_OUT_2 3 #define TEGRA_PMC_CLK_OUT_3_MUX 4 #define TEGRA_PMC_CLK_OUT_3 5 +#define TEGRA_PMC_CLK_BLINK 6 -#define TEGRA_PMC_CLK_MAX 6 +#define TEGRA_PMC_CLK_MAX 7 #endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */
Tegra PMC has a blinking control to output 32 KHz clock to blink pin. This patch adds id for this blink control to use for enabling or disabling the blink output through devicetree. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- include/dt-bindings/soc/tegra-pmc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)