Message ID | 1554407683-31580-17-git-send-email-vidyas@nvidia.com |
---|---|
State | Changes Requested |
Headers | show
Return-Path: <linux-tegra-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="EGHD0LzR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44ZtyT5cd2z9sPp for <incoming@patchwork.ozlabs.org>; Fri, 5 Apr 2019 06:57:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730781AbfDDT5O (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Thu, 4 Apr 2019 15:57:14 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:16899 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728699AbfDDT5N (ORCPT <rfc822; linux-tegra@vger.kernel.org>); Thu, 4 Apr 2019 15:57:13 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id <B5ca661960000>; Thu, 04 Apr 2019 12:57:10 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 04 Apr 2019 12:57:12 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 04 Apr 2019 12:57:12 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 4 Apr 2019 19:57:11 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 4 Apr 2019 19:57:11 +0000 Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id <B5ca661920000>; Thu, 04 Apr 2019 12:57:11 -0700 From: Vidya Sagar <vidyas@nvidia.com> To: <bhelgaas@google.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <kishon@ti.com>, <catalin.marinas@arm.com>, <will.deacon@arm.com>, <lorenzo.pieralisi@arm.com>, <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>, <mperttunen@nvidia.com> CC: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>, <mmaddireddy@nvidia.com>, <vidyas@nvidia.com>, <sagar.tv@gmail.com> Subject: [PATCH V2 16/16] arm64: Add Tegra194 PCIe driver to defconfig Date: Fri, 5 Apr 2019 01:24:43 +0530 Message-ID: <1554407683-31580-17-git-send-email-vidyas@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1554407683-31580-1-git-send-email-vidyas@nvidia.com> References: <1554407683-31580-1-git-send-email-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1554407830; bh=xGS5pjhP8W5P/j0fAzs4Coux+y7ukQm3f4HxFD0fm/E=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=EGHD0LzRox7lQcKTY8xOMrsQVBN0bXHOEQNX7Fwe8C1ouo4mKz8dhPaJA3YRHzLnW +JyEsBomTXXInShoQwnDMHUOlsq7JaQZQy+auiX/nUFncPmdGJ4a/h8pvYgM/uhd3H RDLNgDoTTfdqUGuHukLJdbUNBfrSKHSKPzWavdeRBXgdWUvqrkjm/omv7NIlmHCCK2 MtqtHNTgycB5xLXls2ahY8H3FqBhR76dnv+Ce+Rp3NlKLGbbyKjH8/dVv/IzKjLqYh 1GVJKvCl2uoAQQPJqwMvLgGnFG1RZwSDdRV2AM72/gDaRkGXVom65DlBbbd0IUmPNA 3xOkgl+WaWuZA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: <linux-tegra.vger.kernel.org> X-Mailing-List: linux-tegra@vger.kernel.org |
Series |
Add Tegra194 PCIe support
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expand
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diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 2d9c39033c1a..2ddea5c4e87d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -87,6 +87,7 @@ CONFIG_PCIE_QCOM=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCIE_KIRIN=y CONFIG_PCIE_HISI_STB=y +CONFIG_PCIE_TEGRA194=m CONFIG_ARM64_VA_BITS_48=y CONFIG_SCHED_MC=y CONFIG_NUMA=y
Add PCIe host controller driver for DesignWare core based PCIe controller IP present in Tegra194. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- Changes since [v1]: * Changed CONFIG_PCIE_TEGRA194 from 'y' to 'm' arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)