From patchwork Thu Oct 18 17:55:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timo Alho X-Patchwork-Id: 986084 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="fwrUcK8f"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42bcDf4PHgz9s4s for ; Fri, 19 Oct 2018 04:56:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727613AbeJSB6h (ORCPT ); Thu, 18 Oct 2018 21:58:37 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:5207 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728412AbeJSB6I (ORCPT ); Thu, 18 Oct 2018 21:58:08 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 18 Oct 2018 10:56:07 -0700 Received: from HQMAIL107.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 18 Oct 2018 10:56:03 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 18 Oct 2018 10:56:03 -0700 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 18 Oct 2018 17:56:03 +0000 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 18 Oct 2018 17:56:02 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 18 Oct 2018 17:56:02 +0000 Received: from talho-ln2.nvidia.com (Not Verified[10.21.24.139]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Thu, 18 Oct 2018 10:56:02 -0700 From: Timo Alho To: , , CC: , Timo Alho Subject: [PATCH V2 1/5] firmware: tegra: add helper to check for supported MRQs Date: Thu, 18 Oct 2018 20:55:40 +0300 Message-ID: <1539885344-18974-2-git-send-email-talho@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539885344-18974-1-git-send-email-talho@nvidia.com> References: <1539885344-18974-1-git-send-email-talho@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1539885367; bh=/nisrxMV+WShpfBhWJIioAYQLPGLt4LRXHxsI1olhQw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:Content-Type; b=fwrUcK8fruwtXTLCUnU9iKImtyHPJmxeBvSio/TIFerM3f5BlHQzlTV2I3Ilb+cgB /xY7lJaGm4dHuGKeY16NuDRqpk7dHs52eZgFVHFk22JJH+RSi24FyGO+kJfquTiY78 FGc4j7rBM/rHj8qbfcdDDWlGY7Tluf088lRvfLdYPdfG/lzZHcMSjyVU4toYJid7zf UDKmw8VpRAG2WtrJsyR2X1LjTo189/gZg2joKoMx62osc/5eLrb87clJL8dnIoMEUu E7o1Vb8RWilUmX2CHb4eYIUbH08uFo/ybhi++K71lbsjpszLESTFBSiz3j7s5M8nlK TaSGT0rvPW0zA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add a helper function to check that firmware is supporting a given MRQ command. Signed-off-by: Timo Alho Acked-by: Sivaram Nair --- drivers/firmware/tegra/bpmp.c | 28 ++++++++++++++++++++++++++++ include/soc/tegra/bpmp.h | 7 +++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c index 41448ba..79859ab 100644 --- a/drivers/firmware/tegra/bpmp.c +++ b/drivers/firmware/tegra/bpmp.c @@ -470,6 +470,34 @@ void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, void *data) } EXPORT_SYMBOL_GPL(tegra_bpmp_free_mrq); +bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq) +{ + struct mrq_query_abi_request req = { .mrq = cpu_to_le32(mrq) }; + struct mrq_query_abi_response resp; + struct tegra_bpmp_message msg = { + .mrq = MRQ_QUERY_ABI, + .tx = { + .data = &req, + .size = sizeof(req), + }, + .rx = { + .data = &resp, + .size = sizeof(resp), + }, + }; + int ret; + + ret = tegra_bpmp_transfer(bpmp, &msg); + if (ret != 0 || msg.rx.ret != 0) { + /* something went wrong; assume not supported */ + dev_warn(bpmp->dev, "tegra_bpmp_transfer failed\n"); + return false; + } + + return resp.status == 0; +} +EXPORT_SYMBOL_GPL(tegra_bpmp_mrq_is_supported); + static void tegra_bpmp_mrq_handle_ping(unsigned int mrq, struct tegra_bpmp_channel *channel, void *data) diff --git a/include/soc/tegra/bpmp.h b/include/soc/tegra/bpmp.h index e69e4c4..b02f926 100644 --- a/include/soc/tegra/bpmp.h +++ b/include/soc/tegra/bpmp.h @@ -129,6 +129,7 @@ int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, tegra_bpmp_mrq_handler_t handler, void *data); void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, void *data); +bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq); #else static inline struct tegra_bpmp *tegra_bpmp_get(struct device *dev) { @@ -164,6 +165,12 @@ static inline void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, void *data) { } + +static inline bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, + unsigned int mrq) +{ + return false; +} #endif #if IS_ENABLED(CONFIG_CLK_TEGRA_BPMP)