From patchwork Tue Jun 28 11:20:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 641503 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rf3Kb4dY2z9sCk for ; Tue, 28 Jun 2016 21:21:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752503AbcF1LVi (ORCPT ); Tue, 28 Jun 2016 07:21:38 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:12520 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752143AbcF1LUv (ORCPT ); Tue, 28 Jun 2016 07:20:51 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 28 Jun 2016 04:20:43 -0700 Received: from HQMAIL103.nvidia.com ([172.20.187.11]) by hqnvupgp07.nvidia.com (PGP Universal service); Tue, 28 Jun 2016 04:19:48 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 28 Jun 2016 04:19:48 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 28 Jun 2016 11:20:50 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Tue, 28 Jun 2016 11:20:50 +0000 Received: from jonathanh-lm.nvidia.com (Not Verified[10.21.132.149]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Tue, 28 Jun 2016 04:20:50 -0700 From: Jon Hunter To: Stephen Warren , Thierry Reding , Alexandre Courbot CC: , , Jon Hunter Subject: [RFC PATCH 2/3] soc/tegra: pmc: Enable XUSB partitions on boot Date: Tue, 28 Jun 2016 12:20:43 +0100 Message-ID: <1467112844-26927-3-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1467112844-26927-1-git-send-email-jonathanh@nvidia.com> References: <1467112844-26927-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra XHCI driver does not currently manage the Tegra XUSB power partitions and so it these partitions have not been enabled by the bootloader then the system will crash when probing the XHCI device. While proper support for managing the power partitions is being developed to the XHCI driver for Tegra, for now power on all the XUSB partitions for USB host and super-speed on boot if the XHCI driver is enabled. Signed-off-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 64678ff2173e..afaa5891c8f5 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -822,6 +822,18 @@ static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS)) goto power_on_cleanup; + /* + * FIXME: If XHCI is enabled for Tegra, then power-up the XUSB + * host and super-speed partitions. Once the XHCI driver + * manages the partitions itself this code can be removed. Note + * that we don't register these partitions with the genpd core + * to avoid it from powering down the partitions as they appear + * to be unused. + */ + if (IS_ENABLED(CONFIG_USB_XHCI_TEGRA) && + (id == TEGRA_POWERGATE_XUSBA || id == TEGRA_POWERGATE_XUSBC)) + goto power_on_cleanup; + pm_genpd_init(&pg->genpd, NULL, off); if (of_genpd_add_provider_simple(np, &pg->genpd))