From patchwork Tue May 10 15:14:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 620702 X-Patchwork-Delegate: jonathanh@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3r435C3PN6z9t3h for ; Wed, 11 May 2016 01:26:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753049AbcEJP0m (ORCPT ); Tue, 10 May 2016 11:26:42 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16052 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752872AbcEJPPA (ORCPT ); Tue, 10 May 2016 11:15:00 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 10 May 2016 08:15:00 -0700 Received: from HQMAIL106.nvidia.com ([172.18.146.12]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 10 May 2016 08:14:08 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 10 May 2016 08:14:08 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 10 May 2016 15:14:59 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Tue, 10 May 2016 15:14:59 +0000 Received: from jonathanh-lm.nvidia.com (Not Verified[10.21.132.102]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Tue, 10 May 2016 08:14:59 -0700 From: Jon Hunter To: Marc Zyngier CC: Thomas Gleixner , Jason Cooper , , , Jon Hunter Subject: [PATCH 04/11] irqchip/gic: Don't unnecessarily write the IRQ configuration Date: Tue, 10 May 2016 16:14:38 +0100 Message-ID: <1462893285-13515-5-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1462893285-13515-1-git-send-email-jonathanh@nvidia.com> References: <1462893285-13515-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org If the interrupt configuration matches the current configuration, then don't bother writing the configuration again. Signed-off-by: Jon Hunter Acked-by: Marc Zyngier --- drivers/irqchip/irq-gic-common.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index 2e9443be2b14..eeeefa244933 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -63,13 +63,17 @@ int gic_configure_irq(unsigned int irq, unsigned int type, else if (type & IRQ_TYPE_EDGE_BOTH) val |= confmask; + /* If the current configuration is the same, then we are done */ + if (val == oldval) + return 0; + /* * Write back the new configuration, and possibly re-enable - * the interrupt. If we tried to write a new configuration and failed, + * the interrupt. If we fail to write a new configuration, * return an error. */ writel_relaxed(val, base + GIC_DIST_CONFIG + confoff); - if (readl_relaxed(base + GIC_DIST_CONFIG + confoff) != val && val != oldval) + if (readl_relaxed(base + GIC_DIST_CONFIG + confoff) != val) ret = -EINVAL; if (sync_access)