From patchwork Tue May 3 09:09:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 617858 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qzb1Z2rqSz9t3n for ; Tue, 3 May 2016 19:08:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755328AbcECJIR (ORCPT ); Tue, 3 May 2016 05:08:17 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:19444 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752047AbcECJIQ (ORCPT ); Tue, 3 May 2016 05:08:16 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 03 May 2016 02:07:47 -0700 Received: from HQMAIL103.nvidia.com ([172.20.187.11]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 03 May 2016 02:07:39 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 03 May 2016 02:07:39 -0700 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 3 May 2016 09:08:09 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 3 May 2016 09:08:08 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Tue, 3 May 2016 09:08:08 +0000 Received: from niwei-dev.nvidia.com (Not Verified[10.19.224.146]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Tue, 03 May 2016 02:08:08 -0700 From: Wei Ni To: , CC: , , , , Wei Ni Subject: [PATCH] arm64: tegra: fix compatible string for Tegra132 fuse node Date: Tue, 3 May 2016 17:09:37 +0800 Message-ID: <1462266577-951-1-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch changes the compatible of Tegra132 fuse node to "nvidia,tegra132-efuse", instead of "nvidia,tegra1124-efuse". Because the CONFIG_ARCH_TEGRA_124_SOC will not be enabled for Tegra132, the fuse driver can't find the corresponding node. Signed-off-by: Wei Ni --- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 5d013809448b..ee101cb52f70 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -582,7 +582,7 @@ }; fuse@7000f800 { - compatible = "nvidia,tegra124-efuse"; + compatible = "nvidia,tegra132-efuse"; reg = <0x0 0x7000f800 0x0 0x400>; clocks = <&tegra_car TEGRA124_CLK_FUSE>; clock-names = "fuse";