From patchwork Tue Apr 12 14:56:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 609459 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qkr4J3LFJz9t3n for ; Wed, 13 Apr 2016 01:11:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934028AbcDLPK0 (ORCPT ); Tue, 12 Apr 2016 11:10:26 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:15829 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933499AbcDLPKX (ORCPT ); Tue, 12 Apr 2016 11:10:23 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 12 Apr 2016 08:10:13 -0700 Received: from HQHUB101.nvidia.com ([172.20.187.24]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 12 Apr 2016 08:08:38 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 12 Apr 2016 08:08:38 -0700 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQHUB101.nvidia.com (172.20.187.24) with Microsoft SMTP Server (TLS) id 8.3.406.0; Tue, 12 Apr 2016 08:10:22 -0700 Received: from HQMAIL103.nvidia.com (172.20.187.11) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 12 Apr 2016 15:10:18 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Tue, 12 Apr 2016 15:10:13 +0000 From: Laxman Dewangan To: , , , , , , CC: , , , , Laxman Dewangan Subject: [PATCH 3/7] soc/tegra: pmc: Add interface to get IO rail power status Date: Tue, 12 Apr 2016 20:26:43 +0530 Message-ID: <1460473007-11535-4-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add API to get the IO rail power status of the Tegra IO pads. This will help client driver to get the current power status of IO pads for handling IO pad power. Signed-off-by: Laxman Dewangan --- drivers/soc/tegra/pmc.c | 16 ++++++++++++++++ include/soc/tegra/pmc.h | 6 ++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 762f4fa..0bc8219 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -613,6 +613,22 @@ error: } EXPORT_SYMBOL(tegra_io_rail_power_off); +int tegra_io_rail_power_get_status(unsigned int id) +{ + unsigned long status, value; + unsigned int mask; + + if ((id > 63) || (id == 30) || (id == 31)) + return -EINVAL; + + status = (id < 32) ? IO_DPD_STATUS : IO_DPD2_STATUS; + mask = BIT(id % 32); + value = tegra_pmc_readl(status); + + return !!(value & mask); +} +EXPORT_SYMBOL(tegra_io_rail_power_get_status); + #ifdef CONFIG_PM_SLEEP enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void) { diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h index 58fadc5..4f3db41 100644 --- a/include/soc/tegra/pmc.h +++ b/include/soc/tegra/pmc.h @@ -133,6 +133,7 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk, int tegra_io_rail_power_on(unsigned int id); int tegra_io_rail_power_off(unsigned int id); +int tegra_io_rail_power_get_status(unsigned int id); #else static inline int tegra_powergate_is_powered(unsigned int id) { @@ -170,6 +171,11 @@ static inline int tegra_io_rail_power_off(unsigned int id) { return -ENOSYS; } + +static inline int tegra_io_rail_power_get_status(unsigned int id) +{ + return -ENOTSUP; +} #endif /* CONFIG_ARCH_TEGRA */ #endif /* __SOC_TEGRA_PMC_H__ */