From patchwork Fri Mar 4 14:26:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 592060 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 823671401C7 for ; Sat, 5 Mar 2016 01:26:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757910AbcCDO0u (ORCPT ); Fri, 4 Mar 2016 09:26:50 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:17282 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757649AbcCDO0t (ORCPT ); Fri, 4 Mar 2016 09:26:49 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Fri, 04 Mar 2016 06:26:28 -0800 Received: from hqemhub03.nvidia.com ([172.20.150.15]) by hqnvupgp08.nvidia.com (PGP Universal service); Fri, 04 Mar 2016 06:26:24 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 04 Mar 2016 06:26:24 -0800 Received: from jonathanh-lm.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.406.0; Fri, 4 Mar 2016 06:26:48 -0800 From: Jon Hunter To: CC: Stephen Warren , Thierry Reding , Alexandre Courbot , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jon Hunter Subject: [PATCH] ARM64: tegra: Remove unused #power-domain-cells property Date: Fri, 4 Mar 2016 14:26:43 +0000 Message-ID: <1457101603-8426-1-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Remove the "#power-domain-cells" property which was incorrectly included by commit e53095857166 ("arm64: tegra: Add Tegra210 support"). Signed-off-by: Jon Hunter Acked-by: Thierry Reding --- ARM-SOC maintainers, could we get this into to the v4.5-rc cycle? This only appeared since Tegra210 was added for v4.5 and so it would be good to correct this before the final v4.5. arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index cd4f45ccd6a7..6cd2048defe2 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -580,8 +580,6 @@ reg = <0x0 0x7000e400 0x0 0x400>; clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; - - #power-domain-cells = <1>; }; fuse@0,7000f800 {