| Message ID | 1456778767-18413-1-git-send-email-dev@lynxeye.de |
|---|---|
| State | Accepted |
| Headers | show |
Am Montag, den 29.02.2016, 21:46 +0100 schrieb Lucas Stach: > If the bootloader does not touch PLL_C it will stay in its reset > state, failing to lock when enabled. This leads to consumers of > this clock to fail probing. Fix this by always programming the > PLL with a sane rate, which allows it to lock, at startup. > Those 2 patches haven't been applied, as far as I can see. Any comments on them? > Signed-off-by: Lucas Stach <dev@lynxeye.de> > --- > drivers/clk/tegra/clk-tegra30.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk- > tegra30.c > index 0478565..236e2db 100644 > --- a/drivers/clk/tegra/clk-tegra30.c > +++ b/drivers/clk/tegra/clk-tegra30.c > @@ -1372,6 +1372,7 @@ static struct tegra_clk_init_table init_table[] > __initdata = { > { TEGRA30_CLK_SBC4, TEGRA30_CLK_PLL_P, 100000000, 0 }, > { TEGRA30_CLK_SBC5, TEGRA30_CLK_PLL_P, 100000000, 0 }, > { TEGRA30_CLK_SBC6, TEGRA30_CLK_PLL_P, 100000000, 0 }, > + { TEGRA30_CLK_PLL_C, TEGRA30_CLK_CLK_MAX, 600000000, 0 }, > { TEGRA30_CLK_HOST1X, TEGRA30_CLK_PLL_C, 150000000, 0 }, > { TEGRA30_CLK_DISP1, TEGRA30_CLK_PLL_P, 600000000, 0 }, > { TEGRA30_CLK_DISP2, TEGRA30_CLK_PLL_P, 600000000, 0 }, -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Feb 29, 2016 at 09:46:06PM +0100, Lucas Stach wrote: > If the bootloader does not touch PLL_C it will stay in its reset > state, failing to lock when enabled. This leads to consumers of > this clock to fail probing. Fix this by always programming the > PLL with a sane rate, which allows it to lock, at startup. > > Signed-off-by: Lucas Stach <dev@lynxeye.de> > --- > drivers/clk/tegra/clk-tegra30.c | 1 + > 1 file changed, 1 insertion(+) Applied, thanks. Thierry
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 0478565..236e2db 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1372,6 +1372,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA30_CLK_SBC4, TEGRA30_CLK_PLL_P, 100000000, 0 }, { TEGRA30_CLK_SBC5, TEGRA30_CLK_PLL_P, 100000000, 0 }, { TEGRA30_CLK_SBC6, TEGRA30_CLK_PLL_P, 100000000, 0 }, + { TEGRA30_CLK_PLL_C, TEGRA30_CLK_CLK_MAX, 600000000, 0 }, { TEGRA30_CLK_HOST1X, TEGRA30_CLK_PLL_C, 150000000, 0 }, { TEGRA30_CLK_DISP1, TEGRA30_CLK_PLL_P, 600000000, 0 }, { TEGRA30_CLK_DISP2, TEGRA30_CLK_PLL_P, 600000000, 0 },
If the bootloader does not touch PLL_C it will stay in its reset state, failing to lock when enabled. This leads to consumers of this clock to fail probing. Fix this by always programming the PLL with a sane rate, which allows it to lock, at startup. Signed-off-by: Lucas Stach <dev@lynxeye.de> --- drivers/clk/tegra/clk-tegra30.c | 1 + 1 file changed, 1 insertion(+)