From patchwork Fri Feb 26 09:06:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 588697 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 59D7D140307 for ; Fri, 26 Feb 2016 20:07:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750882AbcBZJHv (ORCPT ); Fri, 26 Feb 2016 04:07:51 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:18802 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750830AbcBZJHV (ORCPT ); Fri, 26 Feb 2016 04:07:21 -0500 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Fri, 26 Feb 2016 01:07:48 -0800 Received: from hqemhub03.nvidia.com ([172.20.150.15]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 26 Feb 2016 01:06:14 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 26 Feb 2016 01:06:14 -0800 Received: from percival.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.406.0; Fri, 26 Feb 2016 01:07:19 -0800 From: Alexandre Courbot To: Thierry Reding , =?UTF-8?q?Terje=20Bergstr=C3=B6m?= , Stephen Warren CC: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, gnurou@gmail.com, Alexandre Courbot Subject: [PATCH v4 2/2] gpu: host1x: Set DMA ops on device creation Date: Fri, 26 Feb 2016 18:06:53 +0900 Message-ID: <1456477613-24995-2-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1456477613-24995-1-git-send-email-acourbot@nvidia.com> References: <1456477613-24995-1-git-send-email-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Currently host1x-instanciated devices have their dma_ops left to NULL, which makes any DMA operation (like buffer import) on ARM64 fallback to the dummy_dma_ops and fail with an error. This patch calls of_dma_configure() with the host1x node when creating such a device, so the proper DMA operations are set. Suggested-by: Thierry Reding Signed-off-by: Alexandre Courbot --- drivers/gpu/host1x/bus.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c index c2e7fba370bb..c27858ae0552 100644 --- a/drivers/gpu/host1x/bus.c +++ b/drivers/gpu/host1x/bus.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "bus.h" #include "dev.h" @@ -396,6 +397,7 @@ static int host1x_device_add(struct host1x *host1x, device->dev.coherent_dma_mask = host1x->dev->coherent_dma_mask; device->dev.dma_mask = &device->dev.coherent_dma_mask; dev_set_name(&device->dev, "%s", driver->driver.name); + of_dma_configure(&device->dev, host1x->dev->of_node); device->dev.release = host1x_device_release; device->dev.bus = &host1x_bus_type; device->dev.parent = host1x->dev;