From patchwork Tue Dec 8 17:04:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 553985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 58F1B1402EC for ; Wed, 9 Dec 2015 04:04:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750966AbbLHREp (ORCPT ); Tue, 8 Dec 2015 12:04:45 -0500 Received: from avon.wwwdotorg.org ([70.85.31.133]:47274 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751146AbbLHREm (ORCPT ); Tue, 8 Dec 2015 12:04:42 -0500 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id 81CAB6253; Tue, 8 Dec 2015 10:04:05 -0700 (MST) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id E6144E462C; Tue, 8 Dec 2015 10:04:34 -0700 (MST) From: Stephen Warren To: swarren@wwwdotorg.org Cc: linux-tegra@vger.kernel.org, Stephen Warren Subject: [cbootimage-configs PATCH] Add p2371-2180 BCT Date: Tue, 8 Dec 2015 10:04:56 -0700 Message-Id: <1449594296-32493-1-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 2.6.3 X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.98.6 at avon.wwwdotorg.org X-Virus-Status: Clean Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Stephen Warren This is for the Jetson TX1 developer kit. The SDRAM timings were taken from the L4T r23 release. Signed-off-by: Stephen Warren --- tegra210/nvidia/p2371-2180/Makefile | 29 + .../p2371-2180/P2180_A00_LP4_DSC_204Mhz.bct.cfg | 1930 ++++++++++++++++++++ tegra210/nvidia/p2371-2180/build.sh | 21 + tegra210/nvidia/p2371-2180/p2371-2180-emmc.img.cfg | 22 + 4 files changed, 2002 insertions(+) create mode 100644 tegra210/nvidia/p2371-2180/Makefile create mode 100755 tegra210/nvidia/p2371-2180/P2180_A00_LP4_DSC_204Mhz.bct.cfg create mode 100755 tegra210/nvidia/p2371-2180/build.sh create mode 100644 tegra210/nvidia/p2371-2180/p2371-2180-emmc.img.cfg diff --git a/tegra210/nvidia/p2371-2180/Makefile b/tegra210/nvidia/p2371-2180/Makefile new file mode 100644 index 000000000000..69cbc5f85efb --- /dev/null +++ b/tegra210/nvidia/p2371-2180/Makefile @@ -0,0 +1,29 @@ +# Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +include ../../../build/pre.mk + +soc := t210 + +bcts := \ + P2180_A00_LP4_DSC_204Mhz.bct + +images := \ + p2371-2180-emmc.img + +include ../../../build/post.mk diff --git a/tegra210/nvidia/p2371-2180/P2180_A00_LP4_DSC_204Mhz.bct.cfg b/tegra210/nvidia/p2371-2180/P2180_A00_LP4_DSC_204Mhz.bct.cfg new file mode 100755 index 000000000000..50cd21b9dbc5 --- /dev/null +++ b/tegra210/nvidia/p2371-2180/P2180_A00_LP4_DSC_204Mhz.bct.cfg @@ -0,0 +1,1930 @@ +# Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00210001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x00084000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; + +# The SDRAM parameters are taken from P2180_A00_LP4_DSC_204Mhz.cfg in L4T r23 +SDRAM[0].MemoryType = NvBootMemoryType_LpDdr4; +SDRAM[0].PllMInputDivider = 0x00000001; +SDRAM[0].PllMFeedbackDivider = 0x00000022; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].PllMSetupControl = 0x00000000; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMKCP = 0x00000000; +SDRAM[0].PllMKVCO = 0x00000000; +SDRAM[0].EmcBctSpare0 = 0x00000000; +SDRAM[0].EmcBctSpare1 = 0x00000000; +SDRAM[0].EmcBctSpare2 = 0x00000000; +SDRAM[0].EmcBctSpare3 = 0x00000000; +SDRAM[0].EmcBctSpare4 = 0x7001bc68; +SDRAM[0].EmcBctSpare5 = 0x0000000a; +SDRAM[0].EmcBctSpare6 = 0x7001b404; +SDRAM[0].EmcBctSpare7 = 0x73245601; +SDRAM[0].EmcBctSpare8 = 0x7000e6c8; +SDRAM[0].EmcBctSpare9 = 0x00000000; +SDRAM[0].EmcBctSpare10 = 0x00000000; +SDRAM[0].EmcBctSpare11 = 0x00000000; +SDRAM[0].EmcBctSpare12 = 0x00000000; +SDRAM[0].EmcBctSpare13 = 0x00000034; +SDRAM[0].EmcClockSource = 0x40188002; +SDRAM[0].EmcClockSourceDll = 0x40000000; +SDRAM[0].ClkRstControllerPllmMisc2Override = 0x00000000; +SDRAM[0].ClkRstControllerPllmMisc2OverrideEnable = 0x00000000; +SDRAM[0].ClearClk2Mc1 = 0x00000000; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa01a51d8; +SDRAM[0].EmcAutoCalConfig2 = 0x05500000; +SDRAM[0].EmcAutoCalConfig3 = 0x00770000; +SDRAM[0].EmcAutoCalConfig4 = 0x00770000; +SDRAM[0].EmcAutoCalConfig5 = 0x00770000; +SDRAM[0].EmcAutoCalConfig6 = 0x00770000; +SDRAM[0].EmcAutoCalConfig7 = 0x00770000; +SDRAM[0].EmcAutoCalConfig8 = 0x00770000; +SDRAM[0].EmcAutoCalVrefSel0 = 0xb3afa6a6; +SDRAM[0].EmcAutoCalVrefSel1 = 0x00009e3c; +SDRAM[0].EmcAutoCalChannel = 0xc1e00303; +SDRAM[0].EmcPmacroAutocalCfg0 = 0x04040404; +SDRAM[0].EmcPmacroAutocalCfg1 = 0x04040404; +SDRAM[0].EmcPmacroAutocalCfg2 = 0x00000000; +SDRAM[0].EmcPmacroRxTerm = 0x1f1f1f1f; +SDRAM[0].EmcPmacroDqTxDrv = 0x1f1f1f1f; +SDRAM[0].EmcPmacroCaTxDrv = 0x1f1f1f1f; +SDRAM[0].EmcPmacroCmdTxDrv = 0x00001f1f; +SDRAM[0].EmcPmacroAutocalCfgCommon = 0x00000804; +SDRAM[0].EmcPmacroZctrl = 0x00000550; +SDRAM[0].EmcAutoCalWait = 0x000001a1; +SDRAM[0].EmcXm2CompPadCtrl = 0x00000032; +SDRAM[0].EmcXm2CompPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2CompPadCtrl3 = 0x00000000; +SDRAM[0].EmcAdrCfg = 0x00000001; +SDRAM[0].EmcPinProgramWait = 0x00000002; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcPinGpioEn = 0x00000003; +SDRAM[0].EmcPinGpio = 0x00000003; +SDRAM[0].EmcTimingControlWait = 0x0000001e; +SDRAM[0].EmcRc = 0x0000000d; +SDRAM[0].EmcRfc = 0x00000025; +SDRAM[0].EmcRfcPb = 0x00000013; +SDRAM[0].EmcRefctrl2 = 0x00000000; +SDRAM[0].EmcRfcSlr = 0x00000000; +SDRAM[0].EmcRas = 0x00000009; +SDRAM[0].EmcRp = 0x00000004; +SDRAM[0].EmcR2r = 0x00000000; +SDRAM[0].EmcW2w = 0x00000000; +SDRAM[0].EmcR2w = 0x0000000b; +SDRAM[0].EmcW2r = 0x0000000d; +SDRAM[0].EmcR2p = 0x00000008; +SDRAM[0].EmcW2p = 0x0000000b; +SDRAM[0].EmcTppd = 0x00000004; +SDRAM[0].EmcCcdmw = 0x00000020; +SDRAM[0].EmcRdRcd = 0x00000006; +SDRAM[0].EmcWrRcd = 0x00000006; +SDRAM[0].EmcRrd = 0x00000006; +SDRAM[0].EmcRext = 0x00000003; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcWdvChk = 0x00000006; +SDRAM[0].EmcWsv = 0x00000002; +SDRAM[0].EmcWev = 0x00000000; +SDRAM[0].EmcWdvMask = 0x00000004; +SDRAM[0].EmcWsDuration = 0x00000008; +SDRAM[0].EmcWeDuration = 0x0000000d; +SDRAM[0].EmcQUse = 0x00000005; +SDRAM[0].EmcQuseWidth = 0x00000006; +SDRAM[0].EmcIbdly = 0x00000000; +SDRAM[0].EmcObdly = 0x00000000; +SDRAM[0].EmcEInput = 0x00000002; +SDRAM[0].EmcEInputDuration = 0x0000000d; +SDRAM[0].EmcPutermExtra = 0x00000000; +SDRAM[0].EmcPutermWidth = 0x0000000b; +SDRAM[0].EmcQRst = 0x00010000; +SDRAM[0].EmcQSafe = 0x00000012; +SDRAM[0].EmcRdv = 0x00000014; +SDRAM[0].EmcRdvMask = 0x00000016; +SDRAM[0].EmcRdvEarly = 0x00000012; +SDRAM[0].EmcRdvEarlyMask = 0x00000014; +SDRAM[0].EmcQpop = 0x0000000a; +SDRAM[0].EmcRefresh = 0x00000304; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000000c1; +SDRAM[0].EmcPdEx2Wr = 0x00000008; +SDRAM[0].EmcPdEx2Rd = 0x00000008; +SDRAM[0].EmcPChg2Pden = 0x00000003; +SDRAM[0].EmcAct2Pden = 0x00000003; +SDRAM[0].EmcAr2Pden = 0x00000003; +SDRAM[0].EmcRw2Pden = 0x00000012; +SDRAM[0].EmcCke2Pden = 0x00000005; +SDRAM[0].EmcPdex2Cke = 0x00000002; +SDRAM[0].EmcPdex2Mrr = 0x0000000d; +SDRAM[0].EmcTxsr = 0x00000027; +SDRAM[0].EmcTxsrDll = 0x00000027; +SDRAM[0].EmcTcke = 0x00000005; +SDRAM[0].EmcTckesr = 0x00000005; +SDRAM[0].EmcTpd = 0x00000004; +SDRAM[0].EmcTfaw = 0x00000009; +SDRAM[0].EmcTrpab = 0x00000005; +SDRAM[0].EmcTClkStable = 0x00000003; +SDRAM[0].EmcTClkStop = 0x00000009; +SDRAM[0].EmcTRefBw = 0x0000031c; +SDRAM[0].EmcFbioCfg5 = 0x9160a00d; +SDRAM[0].EmcFbioCfg7 = 0x00003bbf; +SDRAM[0].EmcFbioCfg8 = 0x0cf30000; +SDRAM[0].EmcCmdMappingCmd0_0 = 0x07050203; +SDRAM[0].EmcCmdMappingCmd0_1 = 0x06041b1c; +SDRAM[0].EmcCmdMappingCmd0_2 = 0x05252523; +SDRAM[0].EmcCmdMappingCmd1_0 = 0x1e0d0b0a; +SDRAM[0].EmcCmdMappingCmd1_1 = 0x240c091d; +SDRAM[0].EmcCmdMappingCmd1_2 = 0x04262608; +SDRAM[0].EmcCmdMappingCmd2_0 = 0x051b0302; +SDRAM[0].EmcCmdMappingCmd2_1 = 0x0604231c; +SDRAM[0].EmcCmdMappingCmd2_2 = 0x09252507; +SDRAM[0].EmcCmdMappingCmd3_0 = 0x0c0b0d0a; +SDRAM[0].EmcCmdMappingCmd3_1 = 0x08091e1d; +SDRAM[0].EmcCmdMappingCmd3_2 = 0x08262624; +SDRAM[0].EmcCmdMappingByte = 0x0a270623; +SDRAM[0].EmcFbioSpare = 0x00000012; +SDRAM[0].EmcCfgRsv = 0xff00ff00; +SDRAM[0].EmcMrs = 0x00000000; +SDRAM[0].EmcEmrs = 0x00000000; +SDRAM[0].EmcEmrs2 = 0x00000000; +SDRAM[0].EmcEmrs3 = 0x00000000; +SDRAM[0].EmcMrw1 = 0x08010004; +SDRAM[0].EmcMrw2 = 0x08020000; +SDRAM[0].EmcMrw3 = 0x080d0000; +SDRAM[0].EmcMrw4 = 0xc0000000; +SDRAM[0].EmcMrw6 = 0x08037171; +SDRAM[0].EmcMrw8 = 0x080b0000; +SDRAM[0].EmcMrw9 = 0x0c0e7272; +SDRAM[0].EmcMrw10 = 0x00000000; +SDRAM[0].EmcMrw12 = 0x0c0d0808; +SDRAM[0].EmcMrw13 = 0x0c0d0000; +SDRAM[0].EmcMrw14 = 0x08161414; +SDRAM[0].EmcMrwExtra = 0x08010004; +SDRAM[0].EmcWarmBootMrwExtra = 0x08110000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000001; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x00cc0015; +SDRAM[0].EmcMrsWaitCnt2 = 0x0033000a; +SDRAM[0].EmcCfg = 0xf3200000; +SDRAM[0].EmcCfg2 = 0x00110805; +SDRAM[0].EmcCfgPipe = 0x0fff0fff; +SDRAM[0].EmcCfgPipeClk = 0x00000000; +SDRAM[0].EmcFdpdCtrlCmdNoRamp = 0x00000001; +SDRAM[0].EmcCfgUpdate = 0x70000301; +SDRAM[0].EmcDbg = 0x01000c00; +SDRAM[0].EmcDbgWriteMux = 0x00000001; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x80000713; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcCfgDigDll = 0x002c00a0; +SDRAM[0].EmcCfgDigDll_1 = 0x00003701; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcDevSelect = 0x00000000; +SDRAM[0].EmcSelDpdCtrl = 0x00040008; +SDRAM[0].EmcFdpdCtrlDq = 0x8020221f; +SDRAM[0].EmcFdpdCtrlCmd = 0x0220f40f; +SDRAM[0].EmcPmacroIbVrefDq_0 = 0x28282828; +SDRAM[0].EmcPmacroIbVrefDq_1 = 0x28282828; +SDRAM[0].EmcPmacroIbVrefDqs_0 = 0x11111111; +SDRAM[0].EmcPmacroIbVrefDqs_1 = 0x11111111; +SDRAM[0].EmcPmacroIbRxrt = 0x000000be; +SDRAM[0].EmcCfgPipe1 = 0x0fff0fff; +SDRAM[0].EmcCfgPipe2 = 0x0fff0fff; +SDRAM[0].EmcPmacroQuseDdllRank0_0 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank0_1 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank0_2 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank0_3 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank0_4 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank0_5 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_0 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_1 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_2 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_3 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_4 = 0x00000000; +SDRAM[0].EmcPmacroQuseDdllRank1_5 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank0_0 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank0_1 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank0_2 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank0_3 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank0_4 = 0x00120010; +SDRAM[0].EmcPmacroObDdllLongDqRank0_5 = 0x00120011; +SDRAM[0].EmcPmacroObDdllLongDqRank1_0 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank1_1 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank1_2 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank1_3 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqRank1_4 = 0x00120010; +SDRAM[0].EmcPmacroObDdllLongDqRank1_5 = 0x00120011; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_0 = 0x00280027; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_1 = 0x0025002a; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_2 = 0x002a002a; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_3 = 0x00260026; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_4 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqsRank0_5 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_0 = 0x00280027; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_1 = 0x0025002a; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_2 = 0x002a002a; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_3 = 0x00260026; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_4 = 0x00000000; +SDRAM[0].EmcPmacroObDdllLongDqsRank1_5 = 0x00000000; +SDRAM[0].EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028; +SDRAM[0].EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028; +SDRAM[0].EmcPmacroDdllLongCmd_0 = 0x00100010; +SDRAM[0].EmcPmacroDdllLongCmd_1 = 0x00120012; +SDRAM[0].EmcPmacroDdllLongCmd_2 = 0x00110011; +SDRAM[0].EmcPmacroDdllLongCmd_3 = 0x00120012; +SDRAM[0].EmcPmacroDdllLongCmd_4 = 0x00000010; +SDRAM[0].EmcPmacroDdllShortCmd_0 = 0x00000000; +SDRAM[0].EmcPmacroDdllShortCmd_1 = 0x00000000; +SDRAM[0].EmcPmacroDdllShortCmd_2 = 0x00000000; +SDRAM[0].WarmBootWait = 0x00000001; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcZcalInterval = 0x00064000; +SDRAM[0].EmcZcalWaitCnt = 0x000900cc; +SDRAM[0].EmcZcalMrwCmd = 0x0051004f; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcZcalInitDev0 = 0x80000001; +SDRAM[0].EmcZcalInitDev1 = 0x40000001; +SDRAM[0].EmcZcalInitWait = 0x00000001; +SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZqCalLpDdr4WarmBoot = 0x00000001; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrsExtra = 0x00000000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000001; +SDRAM[0].PmcVddpSelWait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x0000000f; +SDRAM[0].PmcDdrCfg = 0x20120100; +SDRAM[0].PmcIoDpd3Req = 0x4befffff; +SDRAM[0].PmcIoDpd3ReqWait = 0x00000001; +SDRAM[0].PmcIoDpd4ReqWait = 0x00000002; +SDRAM[0].PmcRegShort = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].PmcDdrCntrlWait = 0x00000000; +SDRAM[0].PmcDdrCntrl = 0x0007ff8b; +SDRAM[0].EmcAcpdControl = 0x00000000; +SDRAM[0].EmcSwizzleRank0Byte0 = 0x73245601; +SDRAM[0].EmcSwizzleRank0Byte1 = 0x56243701; +SDRAM[0].EmcSwizzleRank0Byte2 = 0x32574610; +SDRAM[0].EmcSwizzleRank0Byte3 = 0x23456710; +SDRAM[0].EmcSwizzleRank1Byte0 = 0x72345601; +SDRAM[0].EmcSwizzleRank1Byte1 = 0x23456701; +SDRAM[0].EmcSwizzleRank1Byte2 = 0x54673210; +SDRAM[0].EmcSwizzleRank1Byte3 = 0x54623710; +SDRAM[0].EmcTxdsrvttgen = 0x00000000; +SDRAM[0].EmcDataBrlshft0 = 0x00249249; +SDRAM[0].EmcDataBrlshft1 = 0x00249249; +SDRAM[0].EmcDqsBrlshft0 = 0x00000000; +SDRAM[0].EmcDqsBrlshft1 = 0x00000000; +SDRAM[0].EmcCmdBrlshft0 = 0x00000000; +SDRAM[0].EmcCmdBrlshft1 = 0x00000000; +SDRAM[0].EmcCmdBrlshft2 = 0x00000012; +SDRAM[0].EmcCmdBrlshft3 = 0x00000012; +SDRAM[0].EmcQuseBrlshft0 = 0x00000000; +SDRAM[0].EmcQuseBrlshft1 = 0x00000000; +SDRAM[0].EmcQuseBrlshft2 = 0x00000000; +SDRAM[0].EmcQuseBrlshft3 = 0x00000000; +SDRAM[0].EmcDllCfg0 = 0x1f13412f; +SDRAM[0].EmcDllCfg1 = 0x00010014; +SDRAM[0].EmcPmcScratch1 = 0x4befffff; +SDRAM[0].EmcPmcScratch2 = 0x7fffffff; +SDRAM[0].EmcPmcScratch3 = 0x4005d70b; +SDRAM[0].EmcPmacroPadCfgCtrl = 0x00020000; +SDRAM[0].EmcPmacroVttgenCtrl0 = 0x00030808; +SDRAM[0].EmcPmacroVttgenCtrl1 = 0x00015c00; +SDRAM[0].EmcPmacroVttgenCtrl2 = 0x00101010; +SDRAM[0].EmcPmacroBrickCtrlRfu1 = 0x00001600; +SDRAM[0].EmcPmacroCmdBrickCtrlFdpd = 0x00000000; +SDRAM[0].EmcPmacroBrickCtrlRfu2 = 0x00000000; +SDRAM[0].EmcPmacroDataBrickCtrlFdpd = 0x00000000; +SDRAM[0].EmcPmacroBgBiasCtrl0 = 0x00000034; +SDRAM[0].EmcPmacroDataPadRxCtrl = 0x00050037; +SDRAM[0].EmcPmacroCmdPadRxCtrl = 0x00000000; +SDRAM[0].EmcPmacroDataRxTermMode = 0x00000010; +SDRAM[0].EmcPmacroCmdRxTermMode = 0x00003000; +SDRAM[0].EmcPmacroDataPadTxCtrl = 0x02000111; +SDRAM[0].EmcPmacroCommonPadTxCtrl = 0x00000008; +SDRAM[0].EmcPmacroCmdPadTxCtrl = 0x0a000000; +SDRAM[0].EmcCfg3 = 0x00000040; +SDRAM[0].EmcPmacroTxPwrd0 = 0x10000000; +SDRAM[0].EmcPmacroTxPwrd1 = 0x08000000; +SDRAM[0].EmcPmacroTxPwrd2 = 0x10000000; +SDRAM[0].EmcPmacroTxPwrd3 = 0x08000000; +SDRAM[0].EmcPmacroTxPwrd4 = 0x00000000; +SDRAM[0].EmcPmacroTxPwrd5 = 0x00000000; +SDRAM[0].EmcConfigSampleDelay = 0x00000020; +SDRAM[0].EmcPmacroBrickMapping0 = 0x28190081; +SDRAM[0].EmcPmacroBrickMapping1 = 0x44853293; +SDRAM[0].EmcPmacroBrickMapping2 = 0x76a76a5b; +SDRAM[0].EmcPmacroTxSelClkSrc0 = 0x00000000; +SDRAM[0].EmcPmacroTxSelClkSrc1 = 0x00000000; +SDRAM[0].EmcPmacroTxSelClkSrc2 = 0x00000000; +SDRAM[0].EmcPmacroTxSelClkSrc3 = 0x00000000; +SDRAM[0].EmcPmacroTxSelClkSrc4 = 0x00000000; +SDRAM[0].EmcPmacroTxSelClkSrc5 = 0x00000000; +SDRAM[0].EmcPmacroDdllBypass = 0xefffefff; +SDRAM[0].EmcPmacroDdllPwrd0 = 0xc0c0c0c0; +SDRAM[0].EmcPmacroDdllPwrd1 = 0xc0c0c0c0; +SDRAM[0].EmcPmacroDdllPwrd2 = 0xdcdcdcdc; +SDRAM[0].EmcPmacroCmdCtrl0 = 0x0a0a0a0a; +SDRAM[0].EmcPmacroCmdCtrl1 = 0x0a0a0a0a; +SDRAM[0].EmcPmacroCmdCtrl2 = 0x0a0a0a0a; +SDRAM[0].McEmemAdrCfg = 0x00000001; +SDRAM[0].McEmemAdrCfgDev0 = 0x00070302; +SDRAM[0].McEmemAdrCfgDev1 = 0x00070302; +SDRAM[0].McEmemAdrCfgChannelMask = 0xffff2400; +SDRAM[0].McEmemAdrCfgBankMask0 = 0x6e574400; +SDRAM[0].McEmemAdrCfgBankMask1 = 0x39722800; +SDRAM[0].McEmemAdrCfgBankMask2 = 0x4b9c1000; +SDRAM[0].McEmemCfg = 0x00001000; +SDRAM[0].McEmemArbCfg = 0x08000001; +SDRAM[0].McEmemArbOutstandingReq = 0x8000004c; +SDRAM[0].McEmemArbRefpbHpCtrl = 0x000a1020; +SDRAM[0].McEmemArbRefpbBankCtrl = 0x80001028; +SDRAM[0].McEmemArbTimingRcd = 0x00000001; +SDRAM[0].McEmemArbTimingRp = 0x00000000; +SDRAM[0].McEmemArbTimingRc = 0x00000003; +SDRAM[0].McEmemArbTimingRas = 0x00000001; +SDRAM[0].McEmemArbTimingFaw = 0x00000002; +SDRAM[0].McEmemArbTimingRrd = 0x00000001; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[0].McEmemArbTimingWap2Pre = 0x00000005; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000001; +SDRAM[0].McEmemArbTimingR2W = 0x00000004; +SDRAM[0].McEmemArbTimingW2R = 0x00000005; +SDRAM[0].McEmemArbTimingRFCPB = 0x00000004; +SDRAM[0].McEmemArbDaTurns = 0x02020001; +SDRAM[0].McEmemArbDaCovers = 0x00030201; +SDRAM[0].McEmemArbMisc0 = 0x71c30504; +SDRAM[0].McEmemArbMisc1 = 0x70000f0f; +SDRAM[0].McEmemArbMisc2 = 0x00000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x10000000; +SDRAM[0].McEmemArbOverride1 = 0x00000000; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McDaCfg0 = 0x00000001; +SDRAM[0].McEmemArbTimingCcdmw = 0x00000008; +SDRAM[0].McClkenOverride = 0x00008000; +SDRAM[0].McStatControl = 0x00000000; +SDRAM[0].McVideoProtectBom = 0xfff00000; +SDRAM[0].McVideoProtectBomAdrHi = 0x00000000; +SDRAM[0].McVideoProtectSizeMb = 0x00000000; +SDRAM[0].McVideoProtectVprOverride = 0xe4bac343; +SDRAM[0].McVideoProtectVprOverride1 = 0x00001ed3; +SDRAM[0].McVideoProtectGpuOverride0 = 0x00000000; +SDRAM[0].McVideoProtectGpuOverride1 = 0x00000000; +SDRAM[0].McSecCarveoutBom = 0xfff00000; +SDRAM[0].McSecCarveoutAdrHi = 0x00000000; +SDRAM[0].McSecCarveoutSizeMb = 0x00000000; +SDRAM[0].McVideoProtectWriteAccess = 0x00000000; +SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[0].McGeneralizedCarveout1Bom = 0x00000000; +SDRAM[0].McGeneralizedCarveout1BomHi = 0x00000000; +SDRAM[0].McGeneralizedCarveout1Size128kb = 0x00000008; +SDRAM[0].McGeneralizedCarveout1Access0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1Access1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1Access2 = 0x00300000; +SDRAM[0].McGeneralizedCarveout1Access3 = 0x03000000; +SDRAM[0].McGeneralizedCarveout1Access4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout1Cfg0 = 0x04000c76; +SDRAM[0].McGeneralizedCarveout2Bom = 0x00000000; +SDRAM[0].McGeneralizedCarveout2BomHi = 0x00000000; +SDRAM[0].McGeneralizedCarveout2Size128kb = 0x00000002; +SDRAM[0].McGeneralizedCarveout2Access0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2Access1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2Access2 = 0x03000000; +SDRAM[0].McGeneralizedCarveout2Access3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2Access4 = 0x00000300; +SDRAM[0].McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout2Cfg0 = 0x0440167e; +SDRAM[0].McGeneralizedCarveout3Bom = 0x00000000; +SDRAM[0].McGeneralizedCarveout3BomHi = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Size128kb = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Access0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Access1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Access2 = 0x03000000; +SDRAM[0].McGeneralizedCarveout3Access3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Access4 = 0x00000300; +SDRAM[0].McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout3Cfg0 = 0x04401e7e; +SDRAM[0].McGeneralizedCarveout4Bom = 0x00000000; +SDRAM[0].McGeneralizedCarveout4BomHi = 0x00000000; +SDRAM[0].McGeneralizedCarveout4Size128kb = 0x00000008; +SDRAM[0].McGeneralizedCarveout4Access0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4Access1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4Access2 = 0x00300000; +SDRAM[0].McGeneralizedCarveout4Access3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4Access4 = 0x000000c0; +SDRAM[0].McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout4Cfg0 = 0x04002446; +SDRAM[0].McGeneralizedCarveout5Bom = 0x00000000; +SDRAM[0].McGeneralizedCarveout5BomHi = 0x00000000; +SDRAM[0].McGeneralizedCarveout5Size128kb = 0x00000008; +SDRAM[0].McGeneralizedCarveout5Access0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5Access1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5Access2 = 0x00300000; +SDRAM[0].McGeneralizedCarveout5Access3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5Access4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000; +SDRAM[0].McGeneralizedCarveout5Cfg0 = 0x04002c46; +SDRAM[0].EmcCaTrainingEnable = 0x00000000; +SDRAM[0].SwizzleRankByteEncode = 0x0000002a; +SDRAM[0].BootRomPatchControl = 0x00000000; +SDRAM[0].BootRomPatchData = 0x00000000; +SDRAM[0].McMtsCarveoutBom = 0xfff00000; +SDRAM[0].McMtsCarveoutAdrHi = 0x00000000; +SDRAM[0].McMtsCarveoutSizeMb = 0x00000000; +SDRAM[0].McMtsCarveoutRegCtrl = 0x00000000; + +SDRAM[1].MemoryType = NvBootMemoryType_LpDdr4; +SDRAM[1].PllMInputDivider = 0x00000001; +SDRAM[1].PllMFeedbackDivider = 0x00000022; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].PllMSetupControl = 0x00000000; +SDRAM[1].PllMPostDivider = 0x00000000; +SDRAM[1].PllMKCP = 0x00000000; +SDRAM[1].PllMKVCO = 0x00000000; +SDRAM[1].EmcBctSpare0 = 0x00000000; +SDRAM[1].EmcBctSpare1 = 0x00000000; +SDRAM[1].EmcBctSpare2 = 0x00000000; +SDRAM[1].EmcBctSpare3 = 0x00000000; +SDRAM[1].EmcBctSpare4 = 0x7001bc68; +SDRAM[1].EmcBctSpare5 = 0x0000000a; +SDRAM[1].EmcBctSpare6 = 0x7001b404; +SDRAM[1].EmcBctSpare7 = 0x73245601; +SDRAM[1].EmcBctSpare8 = 0x7000e6c8; +SDRAM[1].EmcBctSpare9 = 0x00000000; +SDRAM[1].EmcBctSpare10 = 0x00000000; +SDRAM[1].EmcBctSpare11 = 0x00000000; +SDRAM[1].EmcBctSpare12 = 0x00000000; +SDRAM[1].EmcBctSpare13 = 0x00000034; +SDRAM[1].EmcClockSource = 0x40188002; +SDRAM[1].EmcClockSourceDll = 0x40000000; +SDRAM[1].ClkRstControllerPllmMisc2Override = 0x00000000; +SDRAM[1].ClkRstControllerPllmMisc2OverrideEnable = 0x00000000; +SDRAM[1].ClearClk2Mc1 = 0x00000000; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa01a51d8; +SDRAM[1].EmcAutoCalConfig2 = 0x05500000; +SDRAM[1].EmcAutoCalConfig3 = 0x00770000; +SDRAM[1].EmcAutoCalConfig4 = 0x00770000; +SDRAM[1].EmcAutoCalConfig5 = 0x00770000; +SDRAM[1].EmcAutoCalConfig6 = 0x00770000; +SDRAM[1].EmcAutoCalConfig7 = 0x00770000; +SDRAM[1].EmcAutoCalConfig8 = 0x00770000; +SDRAM[1].EmcAutoCalVrefSel0 = 0xb3afa6a6; +SDRAM[1].EmcAutoCalVrefSel1 = 0x00009e3c; +SDRAM[1].EmcAutoCalChannel = 0xc1e00303; +SDRAM[1].EmcPmacroAutocalCfg0 = 0x04040404; +SDRAM[1].EmcPmacroAutocalCfg1 = 0x04040404; +SDRAM[1].EmcPmacroAutocalCfg2 = 0x00000000; +SDRAM[1].EmcPmacroRxTerm = 0x1f1f1f1f; +SDRAM[1].EmcPmacroDqTxDrv = 0x1f1f1f1f; +SDRAM[1].EmcPmacroCaTxDrv = 0x1f1f1f1f; +SDRAM[1].EmcPmacroCmdTxDrv = 0x00001f1f; +SDRAM[1].EmcPmacroAutocalCfgCommon = 0x00000804; +SDRAM[1].EmcPmacroZctrl = 0x00000550; +SDRAM[1].EmcAutoCalWait = 0x000001a1; +SDRAM[1].EmcXm2CompPadCtrl = 0x00000032; +SDRAM[1].EmcXm2CompPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2CompPadCtrl3 = 0x00000000; +SDRAM[1].EmcAdrCfg = 0x00000001; +SDRAM[1].EmcPinProgramWait = 0x00000002; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcPinGpioEn = 0x00000003; +SDRAM[1].EmcPinGpio = 0x00000003; +SDRAM[1].EmcTimingControlWait = 0x0000001e; +SDRAM[1].EmcRc = 0x0000000d; +SDRAM[1].EmcRfc = 0x00000025; +SDRAM[1].EmcRfcPb = 0x00000013; +SDRAM[1].EmcRefctrl2 = 0x00000000; +SDRAM[1].EmcRfcSlr = 0x00000000; +SDRAM[1].EmcRas = 0x00000009; +SDRAM[1].EmcRp = 0x00000004; +SDRAM[1].EmcR2r = 0x00000000; +SDRAM[1].EmcW2w = 0x00000000; +SDRAM[1].EmcR2w = 0x0000000b; +SDRAM[1].EmcW2r = 0x0000000d; +SDRAM[1].EmcR2p = 0x00000008; +SDRAM[1].EmcW2p = 0x0000000b; +SDRAM[1].EmcTppd = 0x00000004; +SDRAM[1].EmcCcdmw = 0x00000020; +SDRAM[1].EmcRdRcd = 0x00000006; +SDRAM[1].EmcWrRcd = 0x00000006; +SDRAM[1].EmcRrd = 0x00000006; +SDRAM[1].EmcRext = 0x00000003; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcWdv = 0x00000004; +SDRAM[1].EmcWdvChk = 0x00000006; +SDRAM[1].EmcWsv = 0x00000002; +SDRAM[1].EmcWev = 0x00000000; +SDRAM[1].EmcWdvMask = 0x00000004; +SDRAM[1].EmcWsDuration = 0x00000008; +SDRAM[1].EmcWeDuration = 0x0000000d; +SDRAM[1].EmcQUse = 0x00000005; +SDRAM[1].EmcQuseWidth = 0x00000006; +SDRAM[1].EmcIbdly = 0x00000000; +SDRAM[1].EmcObdly = 0x00000000; +SDRAM[1].EmcEInput = 0x00000002; +SDRAM[1].EmcEInputDuration = 0x0000000d; +SDRAM[1].EmcPutermExtra = 0x00000000; +SDRAM[1].EmcPutermWidth = 0x0000000b; +SDRAM[1].EmcQRst = 0x00010000; +SDRAM[1].EmcQSafe = 0x00000012; +SDRAM[1].EmcRdv = 0x00000014; +SDRAM[1].EmcRdvMask = 0x00000016; +SDRAM[1].EmcRdvEarly = 0x00000012; +SDRAM[1].EmcRdvEarlyMask = 0x00000014; +SDRAM[1].EmcQpop = 0x0000000a; +SDRAM[1].EmcRefresh = 0x00000304; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000000c1; +SDRAM[1].EmcPdEx2Wr = 0x00000008; +SDRAM[1].EmcPdEx2Rd = 0x00000008; +SDRAM[1].EmcPChg2Pden = 0x00000003; +SDRAM[1].EmcAct2Pden = 0x00000003; +SDRAM[1].EmcAr2Pden = 0x00000003; +SDRAM[1].EmcRw2Pden = 0x00000012; +SDRAM[1].EmcCke2Pden = 0x00000005; +SDRAM[1].EmcPdex2Cke = 0x00000002; +SDRAM[1].EmcPdex2Mrr = 0x0000000d; +SDRAM[1].EmcTxsr = 0x00000027; +SDRAM[1].EmcTxsrDll = 0x00000027; +SDRAM[1].EmcTcke = 0x00000005; +SDRAM[1].EmcTckesr = 0x00000005; +SDRAM[1].EmcTpd = 0x00000004; +SDRAM[1].EmcTfaw = 0x00000009; +SDRAM[1].EmcTrpab = 0x00000005; +SDRAM[1].EmcTClkStable = 0x00000003; +SDRAM[1].EmcTClkStop = 0x00000009; +SDRAM[1].EmcTRefBw = 0x0000031c; +SDRAM[1].EmcFbioCfg5 = 0x9160a00d; +SDRAM[1].EmcFbioCfg7 = 0x00003bbf; +SDRAM[1].EmcFbioCfg8 = 0x0cf30000; +SDRAM[1].EmcCmdMappingCmd0_0 = 0x07050203; +SDRAM[1].EmcCmdMappingCmd0_1 = 0x06041b1c; +SDRAM[1].EmcCmdMappingCmd0_2 = 0x05252523; +SDRAM[1].EmcCmdMappingCmd1_0 = 0x1e0d0b0a; +SDRAM[1].EmcCmdMappingCmd1_1 = 0x240c091d; +SDRAM[1].EmcCmdMappingCmd1_2 = 0x04262608; +SDRAM[1].EmcCmdMappingCmd2_0 = 0x051b0302; +SDRAM[1].EmcCmdMappingCmd2_1 = 0x0604231c; +SDRAM[1].EmcCmdMappingCmd2_2 = 0x09252507; +SDRAM[1].EmcCmdMappingCmd3_0 = 0x0c0b0d0a; +SDRAM[1].EmcCmdMappingCmd3_1 = 0x08091e1d; +SDRAM[1].EmcCmdMappingCmd3_2 = 0x08262624; +SDRAM[1].EmcCmdMappingByte = 0x0a270623; +SDRAM[1].EmcFbioSpare = 0x00000012; +SDRAM[1].EmcCfgRsv = 0xff00ff00; +SDRAM[1].EmcMrs = 0x00000000; +SDRAM[1].EmcEmrs = 0x00000000; +SDRAM[1].EmcEmrs2 = 0x00000000; +SDRAM[1].EmcEmrs3 = 0x00000000; +SDRAM[1].EmcMrw1 = 0x08010004; +SDRAM[1].EmcMrw2 = 0x08020000; +SDRAM[1].EmcMrw3 = 0x080d0000; +SDRAM[1].EmcMrw4 = 0xc0000000; +SDRAM[1].EmcMrw6 = 0x08037171; +SDRAM[1].EmcMrw8 = 0x080b0000; +SDRAM[1].EmcMrw9 = 0x0c0e7272; +SDRAM[1].EmcMrw10 = 0x00000000; +SDRAM[1].EmcMrw12 = 0x0c0d0808; +SDRAM[1].EmcMrw13 = 0x0c0d0000; +SDRAM[1].EmcMrw14 = 0x08161414; +SDRAM[1].EmcMrwExtra = 0x08010004; +SDRAM[1].EmcWarmBootMrwExtra = 0x08110000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000001; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x00cc0015; +SDRAM[1].EmcMrsWaitCnt2 = 0x0033000a; +SDRAM[1].EmcCfg = 0xf3200000; +SDRAM[1].EmcCfg2 = 0x00110805; +SDRAM[1].EmcCfgPipe = 0x0fff0fff; +SDRAM[1].EmcCfgPipeClk = 0x00000000; +SDRAM[1].EmcFdpdCtrlCmdNoRamp = 0x00000001; +SDRAM[1].EmcCfgUpdate = 0x70000301; +SDRAM[1].EmcDbg = 0x01000c00; +SDRAM[1].EmcDbgWriteMux = 0x00000001; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x80000713; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcCfgDigDll = 0x002c00a0; +SDRAM[1].EmcCfgDigDll_1 = 0x00003701; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcDevSelect = 0x00000000; +SDRAM[1].EmcSelDpdCtrl = 0x00040008; +SDRAM[1].EmcFdpdCtrlDq = 0x8020221f; +SDRAM[1].EmcFdpdCtrlCmd = 0x0220f40f; +SDRAM[1].EmcPmacroIbVrefDq_0 = 0x28282828; +SDRAM[1].EmcPmacroIbVrefDq_1 = 0x28282828; +SDRAM[1].EmcPmacroIbVrefDqs_0 = 0x11111111; +SDRAM[1].EmcPmacroIbVrefDqs_1 = 0x11111111; +SDRAM[1].EmcPmacroIbRxrt = 0x000000be; +SDRAM[1].EmcCfgPipe1 = 0x0fff0fff; +SDRAM[1].EmcCfgPipe2 = 0x0fff0fff; +SDRAM[1].EmcPmacroQuseDdllRank0_0 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank0_1 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank0_2 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank0_3 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank0_4 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank0_5 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_0 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_1 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_2 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_3 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_4 = 0x00000000; +SDRAM[1].EmcPmacroQuseDdllRank1_5 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank0_0 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank0_1 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank0_2 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank0_3 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank0_4 = 0x00120010; +SDRAM[1].EmcPmacroObDdllLongDqRank0_5 = 0x00120011; +SDRAM[1].EmcPmacroObDdllLongDqRank1_0 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank1_1 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank1_2 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank1_3 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqRank1_4 = 0x00120010; +SDRAM[1].EmcPmacroObDdllLongDqRank1_5 = 0x00120011; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_0 = 0x00280027; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_1 = 0x0025002a; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_2 = 0x002a002a; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_3 = 0x00260026; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_4 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqsRank0_5 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_0 = 0x00280027; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_1 = 0x0025002a; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_2 = 0x002a002a; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_3 = 0x00260026; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_4 = 0x00000000; +SDRAM[1].EmcPmacroObDdllLongDqsRank1_5 = 0x00000000; +SDRAM[1].EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028; +SDRAM[1].EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028; +SDRAM[1].EmcPmacroDdllLongCmd_0 = 0x00100010; +SDRAM[1].EmcPmacroDdllLongCmd_1 = 0x00120012; +SDRAM[1].EmcPmacroDdllLongCmd_2 = 0x00110011; +SDRAM[1].EmcPmacroDdllLongCmd_3 = 0x00120012; +SDRAM[1].EmcPmacroDdllLongCmd_4 = 0x00000010; +SDRAM[1].EmcPmacroDdllShortCmd_0 = 0x00000000; +SDRAM[1].EmcPmacroDdllShortCmd_1 = 0x00000000; +SDRAM[1].EmcPmacroDdllShortCmd_2 = 0x00000000; +SDRAM[1].WarmBootWait = 0x00000001; +SDRAM[1].EmcOdtWrite = 0x00000000; +SDRAM[1].EmcZcalInterval = 0x00064000; +SDRAM[1].EmcZcalWaitCnt = 0x000900cc; +SDRAM[1].EmcZcalMrwCmd = 0x0051004f; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcZcalInitDev0 = 0x80000001; +SDRAM[1].EmcZcalInitDev1 = 0x40000001; +SDRAM[1].EmcZcalInitWait = 0x00000001; +SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZqCalLpDdr4WarmBoot = 0x00000001; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrsExtra = 0x00000000; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000001; +SDRAM[1].PmcVddpSelWait = 0x00000002; +SDRAM[1].PmcDdrPwr = 0x0000000f; +SDRAM[1].PmcDdrCfg = 0x20120100; +SDRAM[1].PmcIoDpd3Req = 0x4befffff; +SDRAM[1].PmcIoDpd3ReqWait = 0x00000001; +SDRAM[1].PmcIoDpd4ReqWait = 0x00000002; +SDRAM[1].PmcRegShort = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].PmcDdrCntrlWait = 0x00000000; +SDRAM[1].PmcDdrCntrl = 0x0007ff8b; +SDRAM[1].EmcAcpdControl = 0x00000000; +SDRAM[1].EmcSwizzleRank0Byte0 = 0x73245601; +SDRAM[1].EmcSwizzleRank0Byte1 = 0x56243701; +SDRAM[1].EmcSwizzleRank0Byte2 = 0x32574610; +SDRAM[1].EmcSwizzleRank0Byte3 = 0x23456710; +SDRAM[1].EmcSwizzleRank1Byte0 = 0x72345601; +SDRAM[1].EmcSwizzleRank1Byte1 = 0x23456701; +SDRAM[1].EmcSwizzleRank1Byte2 = 0x54673210; +SDRAM[1].EmcSwizzleRank1Byte3 = 0x54623710; +SDRAM[1].EmcTxdsrvttgen = 0x00000000; +SDRAM[1].EmcDataBrlshft0 = 0x00249249; +SDRAM[1].EmcDataBrlshft1 = 0x00249249; +SDRAM[1].EmcDqsBrlshft0 = 0x00000000; +SDRAM[1].EmcDqsBrlshft1 = 0x00000000; +SDRAM[1].EmcCmdBrlshft0 = 0x00000000; +SDRAM[1].EmcCmdBrlshft1 = 0x00000000; +SDRAM[1].EmcCmdBrlshft2 = 0x00000012; +SDRAM[1].EmcCmdBrlshft3 = 0x00000012; +SDRAM[1].EmcQuseBrlshft0 = 0x00000000; +SDRAM[1].EmcQuseBrlshft1 = 0x00000000; +SDRAM[1].EmcQuseBrlshft2 = 0x00000000; +SDRAM[1].EmcQuseBrlshft3 = 0x00000000; +SDRAM[1].EmcDllCfg0 = 0x1f13412f; +SDRAM[1].EmcDllCfg1 = 0x00010014; +SDRAM[1].EmcPmcScratch1 = 0x4befffff; +SDRAM[1].EmcPmcScratch2 = 0x7fffffff; +SDRAM[1].EmcPmcScratch3 = 0x4005d70b; +SDRAM[1].EmcPmacroPadCfgCtrl = 0x00020000; +SDRAM[1].EmcPmacroVttgenCtrl0 = 0x00030808; +SDRAM[1].EmcPmacroVttgenCtrl1 = 0x00015c00; +SDRAM[1].EmcPmacroVttgenCtrl2 = 0x00101010; +SDRAM[1].EmcPmacroBrickCtrlRfu1 = 0x00001600; +SDRAM[1].EmcPmacroCmdBrickCtrlFdpd = 0x00000000; +SDRAM[1].EmcPmacroBrickCtrlRfu2 = 0x00000000; +SDRAM[1].EmcPmacroDataBrickCtrlFdpd = 0x00000000; +SDRAM[1].EmcPmacroBgBiasCtrl0 = 0x00000034; +SDRAM[1].EmcPmacroDataPadRxCtrl = 0x00050037; +SDRAM[1].EmcPmacroCmdPadRxCtrl = 0x00000000; +SDRAM[1].EmcPmacroDataRxTermMode = 0x00000010; +SDRAM[1].EmcPmacroCmdRxTermMode = 0x00003000; +SDRAM[1].EmcPmacroDataPadTxCtrl = 0x02000111; +SDRAM[1].EmcPmacroCommonPadTxCtrl = 0x00000008; +SDRAM[1].EmcPmacroCmdPadTxCtrl = 0x0a000000; +SDRAM[1].EmcCfg3 = 0x00000040; +SDRAM[1].EmcPmacroTxPwrd0 = 0x10000000; +SDRAM[1].EmcPmacroTxPwrd1 = 0x08000000; +SDRAM[1].EmcPmacroTxPwrd2 = 0x10000000; +SDRAM[1].EmcPmacroTxPwrd3 = 0x08000000; +SDRAM[1].EmcPmacroTxPwrd4 = 0x00000000; +SDRAM[1].EmcPmacroTxPwrd5 = 0x00000000; +SDRAM[1].EmcConfigSampleDelay = 0x00000020; +SDRAM[1].EmcPmacroBrickMapping0 = 0x28190081; +SDRAM[1].EmcPmacroBrickMapping1 = 0x44853293; +SDRAM[1].EmcPmacroBrickMapping2 = 0x76a76a5b; +SDRAM[1].EmcPmacroTxSelClkSrc0 = 0x00000000; +SDRAM[1].EmcPmacroTxSelClkSrc1 = 0x00000000; +SDRAM[1].EmcPmacroTxSelClkSrc2 = 0x00000000; +SDRAM[1].EmcPmacroTxSelClkSrc3 = 0x00000000; +SDRAM[1].EmcPmacroTxSelClkSrc4 = 0x00000000; +SDRAM[1].EmcPmacroTxSelClkSrc5 = 0x00000000; +SDRAM[1].EmcPmacroDdllBypass = 0xefffefff; +SDRAM[1].EmcPmacroDdllPwrd0 = 0xc0c0c0c0; +SDRAM[1].EmcPmacroDdllPwrd1 = 0xc0c0c0c0; +SDRAM[1].EmcPmacroDdllPwrd2 = 0xdcdcdcdc; +SDRAM[1].EmcPmacroCmdCtrl0 = 0x0a0a0a0a; +SDRAM[1].EmcPmacroCmdCtrl1 = 0x0a0a0a0a; +SDRAM[1].EmcPmacroCmdCtrl2 = 0x0a0a0a0a; +SDRAM[1].McEmemAdrCfg = 0x00000001; +SDRAM[1].McEmemAdrCfgDev0 = 0x00070302; +SDRAM[1].McEmemAdrCfgDev1 = 0x00070302; +SDRAM[1].McEmemAdrCfgChannelMask = 0xffff2400; +SDRAM[1].McEmemAdrCfgBankMask0 = 0x6e574400; +SDRAM[1].McEmemAdrCfgBankMask1 = 0x39722800; +SDRAM[1].McEmemAdrCfgBankMask2 = 0x4b9c1000; +SDRAM[1].McEmemCfg = 0x00001000; +SDRAM[1].McEmemArbCfg = 0x08000001; +SDRAM[1].McEmemArbOutstandingReq = 0x8000004c; +SDRAM[1].McEmemArbRefpbHpCtrl = 0x000a1020; +SDRAM[1].McEmemArbRefpbBankCtrl = 0x80001028; +SDRAM[1].McEmemArbTimingRcd = 0x00000001; +SDRAM[1].McEmemArbTimingRp = 0x00000000; +SDRAM[1].McEmemArbTimingRc = 0x00000003; +SDRAM[1].McEmemArbTimingRas = 0x00000001; +SDRAM[1].McEmemArbTimingFaw = 0x00000002; +SDRAM[1].McEmemArbTimingRrd = 0x00000001; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[1].McEmemArbTimingWap2Pre = 0x00000005; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000001; +SDRAM[1].McEmemArbTimingR2W = 0x00000004; +SDRAM[1].McEmemArbTimingW2R = 0x00000005; +SDRAM[1].McEmemArbTimingRFCPB = 0x00000004; +SDRAM[1].McEmemArbDaTurns = 0x02020001; +SDRAM[1].McEmemArbDaCovers = 0x00030201; +SDRAM[1].McEmemArbMisc0 = 0x71c30504; +SDRAM[1].McEmemArbMisc1 = 0x70000f0f; +SDRAM[1].McEmemArbMisc2 = 0x00000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x10000000; +SDRAM[1].McEmemArbOverride1 = 0x00000000; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McDaCfg0 = 0x00000001; +SDRAM[1].McEmemArbTimingCcdmw = 0x00000008; +SDRAM[1].McClkenOverride = 0x00008000; +SDRAM[1].McStatControl = 0x00000000; +SDRAM[1].McVideoProtectBom = 0xfff00000; +SDRAM[1].McVideoProtectBomAdrHi = 0x00000000; +SDRAM[1].McVideoProtectSizeMb = 0x00000000; +SDRAM[1].McVideoProtectVprOverride = 0xe4bac343; +SDRAM[1].McVideoProtectVprOverride1 = 0x00001ed3; +SDRAM[1].McVideoProtectGpuOverride0 = 0x00000000; +SDRAM[1].McVideoProtectGpuOverride1 = 0x00000000; +SDRAM[1].McSecCarveoutBom = 0xfff00000; +SDRAM[1].McSecCarveoutAdrHi = 0x00000000; +SDRAM[1].McSecCarveoutSizeMb = 0x00000000; +SDRAM[1].McVideoProtectWriteAccess = 0x00000000; +SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[1].McGeneralizedCarveout1Bom = 0x00000000; +SDRAM[1].McGeneralizedCarveout1BomHi = 0x00000000; +SDRAM[1].McGeneralizedCarveout1Size128kb = 0x00000008; +SDRAM[1].McGeneralizedCarveout1Access0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1Access1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1Access2 = 0x00300000; +SDRAM[1].McGeneralizedCarveout1Access3 = 0x03000000; +SDRAM[1].McGeneralizedCarveout1Access4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout1Cfg0 = 0x04000c76; +SDRAM[1].McGeneralizedCarveout2Bom = 0x00000000; +SDRAM[1].McGeneralizedCarveout2BomHi = 0x00000000; +SDRAM[1].McGeneralizedCarveout2Size128kb = 0x00000002; +SDRAM[1].McGeneralizedCarveout2Access0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2Access1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2Access2 = 0x03000000; +SDRAM[1].McGeneralizedCarveout2Access3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2Access4 = 0x00000300; +SDRAM[1].McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout2Cfg0 = 0x0440167e; +SDRAM[1].McGeneralizedCarveout3Bom = 0x00000000; +SDRAM[1].McGeneralizedCarveout3BomHi = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Size128kb = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Access0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Access1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Access2 = 0x03000000; +SDRAM[1].McGeneralizedCarveout3Access3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Access4 = 0x00000300; +SDRAM[1].McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout3Cfg0 = 0x04401e7e; +SDRAM[1].McGeneralizedCarveout4Bom = 0x00000000; +SDRAM[1].McGeneralizedCarveout4BomHi = 0x00000000; +SDRAM[1].McGeneralizedCarveout4Size128kb = 0x00000008; +SDRAM[1].McGeneralizedCarveout4Access0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4Access1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4Access2 = 0x00300000; +SDRAM[1].McGeneralizedCarveout4Access3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4Access4 = 0x000000c0; +SDRAM[1].McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout4Cfg0 = 0x04002446; +SDRAM[1].McGeneralizedCarveout5Bom = 0x00000000; +SDRAM[1].McGeneralizedCarveout5BomHi = 0x00000000; +SDRAM[1].McGeneralizedCarveout5Size128kb = 0x00000008; +SDRAM[1].McGeneralizedCarveout5Access0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5Access1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5Access2 = 0x00300000; +SDRAM[1].McGeneralizedCarveout5Access3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5Access4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000; +SDRAM[1].McGeneralizedCarveout5Cfg0 = 0x04002c46; +SDRAM[1].EmcCaTrainingEnable = 0x00000000; +SDRAM[1].SwizzleRankByteEncode = 0x0000002a; +SDRAM[1].BootRomPatchControl = 0x00000000; +SDRAM[1].BootRomPatchData = 0x00000000; +SDRAM[1].McMtsCarveoutBom = 0xfff00000; +SDRAM[1].McMtsCarveoutAdrHi = 0x00000000; +SDRAM[1].McMtsCarveoutSizeMb = 0x00000000; +SDRAM[1].McMtsCarveoutRegCtrl = 0x00000000; + +SDRAM[2].MemoryType = NvBootMemoryType_LpDdr4; +SDRAM[2].PllMInputDivider = 0x00000001; +SDRAM[2].PllMFeedbackDivider = 0x00000022; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].PllMSetupControl = 0x00000000; +SDRAM[2].PllMPostDivider = 0x00000000; +SDRAM[2].PllMKCP = 0x00000000; +SDRAM[2].PllMKVCO = 0x00000000; +SDRAM[2].EmcBctSpare0 = 0x00000000; +SDRAM[2].EmcBctSpare1 = 0x00000000; +SDRAM[2].EmcBctSpare2 = 0x00000000; +SDRAM[2].EmcBctSpare3 = 0x00000000; +SDRAM[2].EmcBctSpare4 = 0x7001bc68; +SDRAM[2].EmcBctSpare5 = 0x0000000a; +SDRAM[2].EmcBctSpare6 = 0x7001b404; +SDRAM[2].EmcBctSpare7 = 0x73245601; +SDRAM[2].EmcBctSpare8 = 0x7000e6c8; +SDRAM[2].EmcBctSpare9 = 0x00000000; +SDRAM[2].EmcBctSpare10 = 0x00000000; +SDRAM[2].EmcBctSpare11 = 0x00000000; +SDRAM[2].EmcBctSpare12 = 0x00000000; +SDRAM[2].EmcBctSpare13 = 0x00000034; +SDRAM[2].EmcClockSource = 0x40188002; +SDRAM[2].EmcClockSourceDll = 0x40000000; +SDRAM[2].ClkRstControllerPllmMisc2Override = 0x00000000; +SDRAM[2].ClkRstControllerPllmMisc2OverrideEnable = 0x00000000; +SDRAM[2].ClearClk2Mc1 = 0x00000000; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa01a51d8; +SDRAM[2].EmcAutoCalConfig2 = 0x05500000; +SDRAM[2].EmcAutoCalConfig3 = 0x00770000; +SDRAM[2].EmcAutoCalConfig4 = 0x00770000; +SDRAM[2].EmcAutoCalConfig5 = 0x00770000; +SDRAM[2].EmcAutoCalConfig6 = 0x00770000; +SDRAM[2].EmcAutoCalConfig7 = 0x00770000; +SDRAM[2].EmcAutoCalConfig8 = 0x00770000; +SDRAM[2].EmcAutoCalVrefSel0 = 0xb3afa6a6; +SDRAM[2].EmcAutoCalVrefSel1 = 0x00009e3c; +SDRAM[2].EmcAutoCalChannel = 0xc1e00303; +SDRAM[2].EmcPmacroAutocalCfg0 = 0x04040404; +SDRAM[2].EmcPmacroAutocalCfg1 = 0x04040404; +SDRAM[2].EmcPmacroAutocalCfg2 = 0x00000000; +SDRAM[2].EmcPmacroRxTerm = 0x1f1f1f1f; +SDRAM[2].EmcPmacroDqTxDrv = 0x1f1f1f1f; +SDRAM[2].EmcPmacroCaTxDrv = 0x1f1f1f1f; +SDRAM[2].EmcPmacroCmdTxDrv = 0x00001f1f; +SDRAM[2].EmcPmacroAutocalCfgCommon = 0x00000804; +SDRAM[2].EmcPmacroZctrl = 0x00000550; +SDRAM[2].EmcAutoCalWait = 0x000001a1; +SDRAM[2].EmcXm2CompPadCtrl = 0x00000032; +SDRAM[2].EmcXm2CompPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2CompPadCtrl3 = 0x00000000; +SDRAM[2].EmcAdrCfg = 0x00000001; +SDRAM[2].EmcPinProgramWait = 0x00000002; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcPinGpioEn = 0x00000003; +SDRAM[2].EmcPinGpio = 0x00000003; +SDRAM[2].EmcTimingControlWait = 0x0000001e; +SDRAM[2].EmcRc = 0x0000000d; +SDRAM[2].EmcRfc = 0x00000025; +SDRAM[2].EmcRfcPb = 0x00000013; +SDRAM[2].EmcRefctrl2 = 0x00000000; +SDRAM[2].EmcRfcSlr = 0x00000000; +SDRAM[2].EmcRas = 0x00000009; +SDRAM[2].EmcRp = 0x00000004; +SDRAM[2].EmcR2r = 0x00000000; +SDRAM[2].EmcW2w = 0x00000000; +SDRAM[2].EmcR2w = 0x0000000b; +SDRAM[2].EmcW2r = 0x0000000d; +SDRAM[2].EmcR2p = 0x00000008; +SDRAM[2].EmcW2p = 0x0000000b; +SDRAM[2].EmcTppd = 0x00000004; +SDRAM[2].EmcCcdmw = 0x00000020; +SDRAM[2].EmcRdRcd = 0x00000006; +SDRAM[2].EmcWrRcd = 0x00000006; +SDRAM[2].EmcRrd = 0x00000006; +SDRAM[2].EmcRext = 0x00000003; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcWdv = 0x00000004; +SDRAM[2].EmcWdvChk = 0x00000006; +SDRAM[2].EmcWsv = 0x00000002; +SDRAM[2].EmcWev = 0x00000000; +SDRAM[2].EmcWdvMask = 0x00000004; +SDRAM[2].EmcWsDuration = 0x00000008; +SDRAM[2].EmcWeDuration = 0x0000000d; +SDRAM[2].EmcQUse = 0x00000005; +SDRAM[2].EmcQuseWidth = 0x00000006; +SDRAM[2].EmcIbdly = 0x00000000; +SDRAM[2].EmcObdly = 0x00000000; +SDRAM[2].EmcEInput = 0x00000002; +SDRAM[2].EmcEInputDuration = 0x0000000d; +SDRAM[2].EmcPutermExtra = 0x00000000; +SDRAM[2].EmcPutermWidth = 0x0000000b; +SDRAM[2].EmcQRst = 0x00010000; +SDRAM[2].EmcQSafe = 0x00000012; +SDRAM[2].EmcRdv = 0x00000014; +SDRAM[2].EmcRdvMask = 0x00000016; +SDRAM[2].EmcRdvEarly = 0x00000012; +SDRAM[2].EmcRdvEarlyMask = 0x00000014; +SDRAM[2].EmcQpop = 0x0000000a; +SDRAM[2].EmcRefresh = 0x00000304; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000000c1; +SDRAM[2].EmcPdEx2Wr = 0x00000008; +SDRAM[2].EmcPdEx2Rd = 0x00000008; +SDRAM[2].EmcPChg2Pden = 0x00000003; +SDRAM[2].EmcAct2Pden = 0x00000003; +SDRAM[2].EmcAr2Pden = 0x00000003; +SDRAM[2].EmcRw2Pden = 0x00000012; +SDRAM[2].EmcCke2Pden = 0x00000005; +SDRAM[2].EmcPdex2Cke = 0x00000002; +SDRAM[2].EmcPdex2Mrr = 0x0000000d; +SDRAM[2].EmcTxsr = 0x00000027; +SDRAM[2].EmcTxsrDll = 0x00000027; +SDRAM[2].EmcTcke = 0x00000005; +SDRAM[2].EmcTckesr = 0x00000005; +SDRAM[2].EmcTpd = 0x00000004; +SDRAM[2].EmcTfaw = 0x00000009; +SDRAM[2].EmcTrpab = 0x00000005; +SDRAM[2].EmcTClkStable = 0x00000003; +SDRAM[2].EmcTClkStop = 0x00000009; +SDRAM[2].EmcTRefBw = 0x0000031c; +SDRAM[2].EmcFbioCfg5 = 0x9160a00d; +SDRAM[2].EmcFbioCfg7 = 0x00003bbf; +SDRAM[2].EmcFbioCfg8 = 0x0cf30000; +SDRAM[2].EmcCmdMappingCmd0_0 = 0x07050203; +SDRAM[2].EmcCmdMappingCmd0_1 = 0x06041b1c; +SDRAM[2].EmcCmdMappingCmd0_2 = 0x05252523; +SDRAM[2].EmcCmdMappingCmd1_0 = 0x1e0d0b0a; +SDRAM[2].EmcCmdMappingCmd1_1 = 0x240c091d; +SDRAM[2].EmcCmdMappingCmd1_2 = 0x04262608; +SDRAM[2].EmcCmdMappingCmd2_0 = 0x051b0302; +SDRAM[2].EmcCmdMappingCmd2_1 = 0x0604231c; +SDRAM[2].EmcCmdMappingCmd2_2 = 0x09252507; +SDRAM[2].EmcCmdMappingCmd3_0 = 0x0c0b0d0a; +SDRAM[2].EmcCmdMappingCmd3_1 = 0x08091e1d; +SDRAM[2].EmcCmdMappingCmd3_2 = 0x08262624; +SDRAM[2].EmcCmdMappingByte = 0x0a270623; +SDRAM[2].EmcFbioSpare = 0x00000012; +SDRAM[2].EmcCfgRsv = 0xff00ff00; +SDRAM[2].EmcMrs = 0x00000000; +SDRAM[2].EmcEmrs = 0x00000000; +SDRAM[2].EmcEmrs2 = 0x00000000; +SDRAM[2].EmcEmrs3 = 0x00000000; +SDRAM[2].EmcMrw1 = 0x08010004; +SDRAM[2].EmcMrw2 = 0x08020000; +SDRAM[2].EmcMrw3 = 0x080d0000; +SDRAM[2].EmcMrw4 = 0xc0000000; +SDRAM[2].EmcMrw6 = 0x08037171; +SDRAM[2].EmcMrw8 = 0x080b0000; +SDRAM[2].EmcMrw9 = 0x0c0e7272; +SDRAM[2].EmcMrw10 = 0x00000000; +SDRAM[2].EmcMrw12 = 0x0c0d0808; +SDRAM[2].EmcMrw13 = 0x0c0d0000; +SDRAM[2].EmcMrw14 = 0x08161414; +SDRAM[2].EmcMrwExtra = 0x08010004; +SDRAM[2].EmcWarmBootMrwExtra = 0x08110000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000001; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x00cc0015; +SDRAM[2].EmcMrsWaitCnt2 = 0x0033000a; +SDRAM[2].EmcCfg = 0xf3200000; +SDRAM[2].EmcCfg2 = 0x00110805; +SDRAM[2].EmcCfgPipe = 0x0fff0fff; +SDRAM[2].EmcCfgPipeClk = 0x00000000; +SDRAM[2].EmcFdpdCtrlCmdNoRamp = 0x00000001; +SDRAM[2].EmcCfgUpdate = 0x70000301; +SDRAM[2].EmcDbg = 0x01000c00; +SDRAM[2].EmcDbgWriteMux = 0x00000001; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x80000713; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcCfgDigDll = 0x002c00a0; +SDRAM[2].EmcCfgDigDll_1 = 0x00003701; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcDevSelect = 0x00000000; +SDRAM[2].EmcSelDpdCtrl = 0x00040008; +SDRAM[2].EmcFdpdCtrlDq = 0x8020221f; +SDRAM[2].EmcFdpdCtrlCmd = 0x0220f40f; +SDRAM[2].EmcPmacroIbVrefDq_0 = 0x28282828; +SDRAM[2].EmcPmacroIbVrefDq_1 = 0x28282828; +SDRAM[2].EmcPmacroIbVrefDqs_0 = 0x11111111; +SDRAM[2].EmcPmacroIbVrefDqs_1 = 0x11111111; +SDRAM[2].EmcPmacroIbRxrt = 0x000000be; +SDRAM[2].EmcCfgPipe1 = 0x0fff0fff; +SDRAM[2].EmcCfgPipe2 = 0x0fff0fff; +SDRAM[2].EmcPmacroQuseDdllRank0_0 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank0_1 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank0_2 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank0_3 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank0_4 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank0_5 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_0 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_1 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_2 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_3 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_4 = 0x00000000; +SDRAM[2].EmcPmacroQuseDdllRank1_5 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank0_0 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank0_1 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank0_2 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank0_3 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank0_4 = 0x00120010; +SDRAM[2].EmcPmacroObDdllLongDqRank0_5 = 0x00120011; +SDRAM[2].EmcPmacroObDdllLongDqRank1_0 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank1_1 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank1_2 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank1_3 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqRank1_4 = 0x00120010; +SDRAM[2].EmcPmacroObDdllLongDqRank1_5 = 0x00120011; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_0 = 0x00280027; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_1 = 0x0025002a; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_2 = 0x002a002a; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_3 = 0x00260026; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_4 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqsRank0_5 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_0 = 0x00280027; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_1 = 0x0025002a; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_2 = 0x002a002a; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_3 = 0x00260026; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_4 = 0x00000000; +SDRAM[2].EmcPmacroObDdllLongDqsRank1_5 = 0x00000000; +SDRAM[2].EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028; +SDRAM[2].EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028; +SDRAM[2].EmcPmacroDdllLongCmd_0 = 0x00100010; +SDRAM[2].EmcPmacroDdllLongCmd_1 = 0x00120012; +SDRAM[2].EmcPmacroDdllLongCmd_2 = 0x00110011; +SDRAM[2].EmcPmacroDdllLongCmd_3 = 0x00120012; +SDRAM[2].EmcPmacroDdllLongCmd_4 = 0x00000010; +SDRAM[2].EmcPmacroDdllShortCmd_0 = 0x00000000; +SDRAM[2].EmcPmacroDdllShortCmd_1 = 0x00000000; +SDRAM[2].EmcPmacroDdllShortCmd_2 = 0x00000000; +SDRAM[2].WarmBootWait = 0x00000001; +SDRAM[2].EmcOdtWrite = 0x00000000; +SDRAM[2].EmcZcalInterval = 0x00064000; +SDRAM[2].EmcZcalWaitCnt = 0x000900cc; +SDRAM[2].EmcZcalMrwCmd = 0x0051004f; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcZcalInitDev0 = 0x80000001; +SDRAM[2].EmcZcalInitDev1 = 0x40000001; +SDRAM[2].EmcZcalInitWait = 0x00000001; +SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZqCalLpDdr4WarmBoot = 0x00000001; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrsExtra = 0x00000000; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000001; +SDRAM[2].PmcVddpSelWait = 0x00000002; +SDRAM[2].PmcDdrPwr = 0x0000000f; +SDRAM[2].PmcDdrCfg = 0x20120100; +SDRAM[2].PmcIoDpd3Req = 0x4befffff; +SDRAM[2].PmcIoDpd3ReqWait = 0x00000001; +SDRAM[2].PmcIoDpd4ReqWait = 0x00000002; +SDRAM[2].PmcRegShort = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].PmcDdrCntrlWait = 0x00000000; +SDRAM[2].PmcDdrCntrl = 0x0007ff8b; +SDRAM[2].EmcAcpdControl = 0x00000000; +SDRAM[2].EmcSwizzleRank0Byte0 = 0x73245601; +SDRAM[2].EmcSwizzleRank0Byte1 = 0x56243701; +SDRAM[2].EmcSwizzleRank0Byte2 = 0x32574610; +SDRAM[2].EmcSwizzleRank0Byte3 = 0x23456710; +SDRAM[2].EmcSwizzleRank1Byte0 = 0x72345601; +SDRAM[2].EmcSwizzleRank1Byte1 = 0x23456701; +SDRAM[2].EmcSwizzleRank1Byte2 = 0x54673210; +SDRAM[2].EmcSwizzleRank1Byte3 = 0x54623710; +SDRAM[2].EmcTxdsrvttgen = 0x00000000; +SDRAM[2].EmcDataBrlshft0 = 0x00249249; +SDRAM[2].EmcDataBrlshft1 = 0x00249249; +SDRAM[2].EmcDqsBrlshft0 = 0x00000000; +SDRAM[2].EmcDqsBrlshft1 = 0x00000000; +SDRAM[2].EmcCmdBrlshft0 = 0x00000000; +SDRAM[2].EmcCmdBrlshft1 = 0x00000000; +SDRAM[2].EmcCmdBrlshft2 = 0x00000012; +SDRAM[2].EmcCmdBrlshft3 = 0x00000012; +SDRAM[2].EmcQuseBrlshft0 = 0x00000000; +SDRAM[2].EmcQuseBrlshft1 = 0x00000000; +SDRAM[2].EmcQuseBrlshft2 = 0x00000000; +SDRAM[2].EmcQuseBrlshft3 = 0x00000000; +SDRAM[2].EmcDllCfg0 = 0x1f13412f; +SDRAM[2].EmcDllCfg1 = 0x00010014; +SDRAM[2].EmcPmcScratch1 = 0x4befffff; +SDRAM[2].EmcPmcScratch2 = 0x7fffffff; +SDRAM[2].EmcPmcScratch3 = 0x4005d70b; +SDRAM[2].EmcPmacroPadCfgCtrl = 0x00020000; +SDRAM[2].EmcPmacroVttgenCtrl0 = 0x00030808; +SDRAM[2].EmcPmacroVttgenCtrl1 = 0x00015c00; +SDRAM[2].EmcPmacroVttgenCtrl2 = 0x00101010; +SDRAM[2].EmcPmacroBrickCtrlRfu1 = 0x00001600; +SDRAM[2].EmcPmacroCmdBrickCtrlFdpd = 0x00000000; +SDRAM[2].EmcPmacroBrickCtrlRfu2 = 0x00000000; +SDRAM[2].EmcPmacroDataBrickCtrlFdpd = 0x00000000; +SDRAM[2].EmcPmacroBgBiasCtrl0 = 0x00000034; +SDRAM[2].EmcPmacroDataPadRxCtrl = 0x00050037; +SDRAM[2].EmcPmacroCmdPadRxCtrl = 0x00000000; +SDRAM[2].EmcPmacroDataRxTermMode = 0x00000010; +SDRAM[2].EmcPmacroCmdRxTermMode = 0x00003000; +SDRAM[2].EmcPmacroDataPadTxCtrl = 0x02000111; +SDRAM[2].EmcPmacroCommonPadTxCtrl = 0x00000008; +SDRAM[2].EmcPmacroCmdPadTxCtrl = 0x0a000000; +SDRAM[2].EmcCfg3 = 0x00000040; +SDRAM[2].EmcPmacroTxPwrd0 = 0x10000000; +SDRAM[2].EmcPmacroTxPwrd1 = 0x08000000; +SDRAM[2].EmcPmacroTxPwrd2 = 0x10000000; +SDRAM[2].EmcPmacroTxPwrd3 = 0x08000000; +SDRAM[2].EmcPmacroTxPwrd4 = 0x00000000; +SDRAM[2].EmcPmacroTxPwrd5 = 0x00000000; +SDRAM[2].EmcConfigSampleDelay = 0x00000020; +SDRAM[2].EmcPmacroBrickMapping0 = 0x28190081; +SDRAM[2].EmcPmacroBrickMapping1 = 0x44853293; +SDRAM[2].EmcPmacroBrickMapping2 = 0x76a76a5b; +SDRAM[2].EmcPmacroTxSelClkSrc0 = 0x00000000; +SDRAM[2].EmcPmacroTxSelClkSrc1 = 0x00000000; +SDRAM[2].EmcPmacroTxSelClkSrc2 = 0x00000000; +SDRAM[2].EmcPmacroTxSelClkSrc3 = 0x00000000; +SDRAM[2].EmcPmacroTxSelClkSrc4 = 0x00000000; +SDRAM[2].EmcPmacroTxSelClkSrc5 = 0x00000000; +SDRAM[2].EmcPmacroDdllBypass = 0xefffefff; +SDRAM[2].EmcPmacroDdllPwrd0 = 0xc0c0c0c0; +SDRAM[2].EmcPmacroDdllPwrd1 = 0xc0c0c0c0; +SDRAM[2].EmcPmacroDdllPwrd2 = 0xdcdcdcdc; +SDRAM[2].EmcPmacroCmdCtrl0 = 0x0a0a0a0a; +SDRAM[2].EmcPmacroCmdCtrl1 = 0x0a0a0a0a; +SDRAM[2].EmcPmacroCmdCtrl2 = 0x0a0a0a0a; +SDRAM[2].McEmemAdrCfg = 0x00000001; +SDRAM[2].McEmemAdrCfgDev0 = 0x00070302; +SDRAM[2].McEmemAdrCfgDev1 = 0x00070302; +SDRAM[2].McEmemAdrCfgChannelMask = 0xffff2400; +SDRAM[2].McEmemAdrCfgBankMask0 = 0x6e574400; +SDRAM[2].McEmemAdrCfgBankMask1 = 0x39722800; +SDRAM[2].McEmemAdrCfgBankMask2 = 0x4b9c1000; +SDRAM[2].McEmemCfg = 0x00001000; +SDRAM[2].McEmemArbCfg = 0x08000001; +SDRAM[2].McEmemArbOutstandingReq = 0x8000004c; +SDRAM[2].McEmemArbRefpbHpCtrl = 0x000a1020; +SDRAM[2].McEmemArbRefpbBankCtrl = 0x80001028; +SDRAM[2].McEmemArbTimingRcd = 0x00000001; +SDRAM[2].McEmemArbTimingRp = 0x00000000; +SDRAM[2].McEmemArbTimingRc = 0x00000003; +SDRAM[2].McEmemArbTimingRas = 0x00000001; +SDRAM[2].McEmemArbTimingFaw = 0x00000002; +SDRAM[2].McEmemArbTimingRrd = 0x00000001; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[2].McEmemArbTimingWap2Pre = 0x00000005; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000001; +SDRAM[2].McEmemArbTimingR2W = 0x00000004; +SDRAM[2].McEmemArbTimingW2R = 0x00000005; +SDRAM[2].McEmemArbTimingRFCPB = 0x00000004; +SDRAM[2].McEmemArbDaTurns = 0x02020001; +SDRAM[2].McEmemArbDaCovers = 0x00030201; +SDRAM[2].McEmemArbMisc0 = 0x71c30504; +SDRAM[2].McEmemArbMisc1 = 0x70000f0f; +SDRAM[2].McEmemArbMisc2 = 0x00000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x10000000; +SDRAM[2].McEmemArbOverride1 = 0x00000000; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McDaCfg0 = 0x00000001; +SDRAM[2].McEmemArbTimingCcdmw = 0x00000008; +SDRAM[2].McClkenOverride = 0x00008000; +SDRAM[2].McStatControl = 0x00000000; +SDRAM[2].McVideoProtectBom = 0xfff00000; +SDRAM[2].McVideoProtectBomAdrHi = 0x00000000; +SDRAM[2].McVideoProtectSizeMb = 0x00000000; +SDRAM[2].McVideoProtectVprOverride = 0xe4bac343; +SDRAM[2].McVideoProtectVprOverride1 = 0x00001ed3; +SDRAM[2].McVideoProtectGpuOverride0 = 0x00000000; +SDRAM[2].McVideoProtectGpuOverride1 = 0x00000000; +SDRAM[2].McSecCarveoutBom = 0xfff00000; +SDRAM[2].McSecCarveoutAdrHi = 0x00000000; +SDRAM[2].McSecCarveoutSizeMb = 0x00000000; +SDRAM[2].McVideoProtectWriteAccess = 0x00000000; +SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[2].McGeneralizedCarveout1Bom = 0x00000000; +SDRAM[2].McGeneralizedCarveout1BomHi = 0x00000000; +SDRAM[2].McGeneralizedCarveout1Size128kb = 0x00000008; +SDRAM[2].McGeneralizedCarveout1Access0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1Access1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1Access2 = 0x00300000; +SDRAM[2].McGeneralizedCarveout1Access3 = 0x03000000; +SDRAM[2].McGeneralizedCarveout1Access4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout1Cfg0 = 0x04000c76; +SDRAM[2].McGeneralizedCarveout2Bom = 0x00000000; +SDRAM[2].McGeneralizedCarveout2BomHi = 0x00000000; +SDRAM[2].McGeneralizedCarveout2Size128kb = 0x00000002; +SDRAM[2].McGeneralizedCarveout2Access0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2Access1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2Access2 = 0x03000000; +SDRAM[2].McGeneralizedCarveout2Access3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2Access4 = 0x00000300; +SDRAM[2].McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout2Cfg0 = 0x0440167e; +SDRAM[2].McGeneralizedCarveout3Bom = 0x00000000; +SDRAM[2].McGeneralizedCarveout3BomHi = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Size128kb = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Access0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Access1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Access2 = 0x03000000; +SDRAM[2].McGeneralizedCarveout3Access3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Access4 = 0x00000300; +SDRAM[2].McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout3Cfg0 = 0x04401e7e; +SDRAM[2].McGeneralizedCarveout4Bom = 0x00000000; +SDRAM[2].McGeneralizedCarveout4BomHi = 0x00000000; +SDRAM[2].McGeneralizedCarveout4Size128kb = 0x00000008; +SDRAM[2].McGeneralizedCarveout4Access0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4Access1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4Access2 = 0x00300000; +SDRAM[2].McGeneralizedCarveout4Access3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4Access4 = 0x000000c0; +SDRAM[2].McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout4Cfg0 = 0x04002446; +SDRAM[2].McGeneralizedCarveout5Bom = 0x00000000; +SDRAM[2].McGeneralizedCarveout5BomHi = 0x00000000; +SDRAM[2].McGeneralizedCarveout5Size128kb = 0x00000008; +SDRAM[2].McGeneralizedCarveout5Access0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5Access1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5Access2 = 0x00300000; +SDRAM[2].McGeneralizedCarveout5Access3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5Access4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000; +SDRAM[2].McGeneralizedCarveout5Cfg0 = 0x04002c46; +SDRAM[2].EmcCaTrainingEnable = 0x00000000; +SDRAM[2].SwizzleRankByteEncode = 0x0000002a; +SDRAM[2].BootRomPatchControl = 0x00000000; +SDRAM[2].BootRomPatchData = 0x00000000; +SDRAM[2].McMtsCarveoutBom = 0xfff00000; +SDRAM[2].McMtsCarveoutAdrHi = 0x00000000; +SDRAM[2].McMtsCarveoutSizeMb = 0x00000000; +SDRAM[2].McMtsCarveoutRegCtrl = 0x00000000; + +SDRAM[3].MemoryType = NvBootMemoryType_LpDdr4; +SDRAM[3].PllMInputDivider = 0x00000001; +SDRAM[3].PllMFeedbackDivider = 0x00000022; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].PllMSetupControl = 0x00000000; +SDRAM[3].PllMPostDivider = 0x00000000; +SDRAM[3].PllMKCP = 0x00000000; +SDRAM[3].PllMKVCO = 0x00000000; +SDRAM[3].EmcBctSpare0 = 0x00000000; +SDRAM[3].EmcBctSpare1 = 0x00000000; +SDRAM[3].EmcBctSpare2 = 0x00000000; +SDRAM[3].EmcBctSpare3 = 0x00000000; +SDRAM[3].EmcBctSpare4 = 0x7001bc68; +SDRAM[3].EmcBctSpare5 = 0x0000000a; +SDRAM[3].EmcBctSpare6 = 0x7001b404; +SDRAM[3].EmcBctSpare7 = 0x73245601; +SDRAM[3].EmcBctSpare8 = 0x7000e6c8; +SDRAM[3].EmcBctSpare9 = 0x00000000; +SDRAM[3].EmcBctSpare10 = 0x00000000; +SDRAM[3].EmcBctSpare11 = 0x00000000; +SDRAM[3].EmcBctSpare12 = 0x00000000; +SDRAM[3].EmcBctSpare13 = 0x00000034; +SDRAM[3].EmcClockSource = 0x40188002; +SDRAM[3].EmcClockSourceDll = 0x40000000; +SDRAM[3].ClkRstControllerPllmMisc2Override = 0x00000000; +SDRAM[3].ClkRstControllerPllmMisc2OverrideEnable = 0x00000000; +SDRAM[3].ClearClk2Mc1 = 0x00000000; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa01a51d8; +SDRAM[3].EmcAutoCalConfig2 = 0x05500000; +SDRAM[3].EmcAutoCalConfig3 = 0x00770000; +SDRAM[3].EmcAutoCalConfig4 = 0x00770000; +SDRAM[3].EmcAutoCalConfig5 = 0x00770000; +SDRAM[3].EmcAutoCalConfig6 = 0x00770000; +SDRAM[3].EmcAutoCalConfig7 = 0x00770000; +SDRAM[3].EmcAutoCalConfig8 = 0x00770000; +SDRAM[3].EmcAutoCalVrefSel0 = 0xb3afa6a6; +SDRAM[3].EmcAutoCalVrefSel1 = 0x00009e3c; +SDRAM[3].EmcAutoCalChannel = 0xc1e00303; +SDRAM[3].EmcPmacroAutocalCfg0 = 0x04040404; +SDRAM[3].EmcPmacroAutocalCfg1 = 0x04040404; +SDRAM[3].EmcPmacroAutocalCfg2 = 0x00000000; +SDRAM[3].EmcPmacroRxTerm = 0x1f1f1f1f; +SDRAM[3].EmcPmacroDqTxDrv = 0x1f1f1f1f; +SDRAM[3].EmcPmacroCaTxDrv = 0x1f1f1f1f; +SDRAM[3].EmcPmacroCmdTxDrv = 0x00001f1f; +SDRAM[3].EmcPmacroAutocalCfgCommon = 0x00000804; +SDRAM[3].EmcPmacroZctrl = 0x00000550; +SDRAM[3].EmcAutoCalWait = 0x000001a1; +SDRAM[3].EmcXm2CompPadCtrl = 0x00000032; +SDRAM[3].EmcXm2CompPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2CompPadCtrl3 = 0x00000000; +SDRAM[3].EmcAdrCfg = 0x00000001; +SDRAM[3].EmcPinProgramWait = 0x00000002; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcPinGpioEn = 0x00000003; +SDRAM[3].EmcPinGpio = 0x00000003; +SDRAM[3].EmcTimingControlWait = 0x0000001e; +SDRAM[3].EmcRc = 0x0000000d; +SDRAM[3].EmcRfc = 0x00000025; +SDRAM[3].EmcRfcPb = 0x00000013; +SDRAM[3].EmcRefctrl2 = 0x00000000; +SDRAM[3].EmcRfcSlr = 0x00000000; +SDRAM[3].EmcRas = 0x00000009; +SDRAM[3].EmcRp = 0x00000004; +SDRAM[3].EmcR2r = 0x00000000; +SDRAM[3].EmcW2w = 0x00000000; +SDRAM[3].EmcR2w = 0x0000000b; +SDRAM[3].EmcW2r = 0x0000000d; +SDRAM[3].EmcR2p = 0x00000008; +SDRAM[3].EmcW2p = 0x0000000b; +SDRAM[3].EmcTppd = 0x00000004; +SDRAM[3].EmcCcdmw = 0x00000020; +SDRAM[3].EmcRdRcd = 0x00000006; +SDRAM[3].EmcWrRcd = 0x00000006; +SDRAM[3].EmcRrd = 0x00000006; +SDRAM[3].EmcRext = 0x00000003; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcWdv = 0x00000004; +SDRAM[3].EmcWdvChk = 0x00000006; +SDRAM[3].EmcWsv = 0x00000002; +SDRAM[3].EmcWev = 0x00000000; +SDRAM[3].EmcWdvMask = 0x00000004; +SDRAM[3].EmcWsDuration = 0x00000008; +SDRAM[3].EmcWeDuration = 0x0000000d; +SDRAM[3].EmcQUse = 0x00000005; +SDRAM[3].EmcQuseWidth = 0x00000006; +SDRAM[3].EmcIbdly = 0x00000000; +SDRAM[3].EmcObdly = 0x00000000; +SDRAM[3].EmcEInput = 0x00000002; +SDRAM[3].EmcEInputDuration = 0x0000000d; +SDRAM[3].EmcPutermExtra = 0x00000000; +SDRAM[3].EmcPutermWidth = 0x0000000b; +SDRAM[3].EmcQRst = 0x00010000; +SDRAM[3].EmcQSafe = 0x00000012; +SDRAM[3].EmcRdv = 0x00000014; +SDRAM[3].EmcRdvMask = 0x00000016; +SDRAM[3].EmcRdvEarly = 0x00000012; +SDRAM[3].EmcRdvEarlyMask = 0x00000014; +SDRAM[3].EmcQpop = 0x0000000a; +SDRAM[3].EmcRefresh = 0x00000304; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000000c1; +SDRAM[3].EmcPdEx2Wr = 0x00000008; +SDRAM[3].EmcPdEx2Rd = 0x00000008; +SDRAM[3].EmcPChg2Pden = 0x00000003; +SDRAM[3].EmcAct2Pden = 0x00000003; +SDRAM[3].EmcAr2Pden = 0x00000003; +SDRAM[3].EmcRw2Pden = 0x00000012; +SDRAM[3].EmcCke2Pden = 0x00000005; +SDRAM[3].EmcPdex2Cke = 0x00000002; +SDRAM[3].EmcPdex2Mrr = 0x0000000d; +SDRAM[3].EmcTxsr = 0x00000027; +SDRAM[3].EmcTxsrDll = 0x00000027; +SDRAM[3].EmcTcke = 0x00000005; +SDRAM[3].EmcTckesr = 0x00000005; +SDRAM[3].EmcTpd = 0x00000004; +SDRAM[3].EmcTfaw = 0x00000009; +SDRAM[3].EmcTrpab = 0x00000005; +SDRAM[3].EmcTClkStable = 0x00000003; +SDRAM[3].EmcTClkStop = 0x00000009; +SDRAM[3].EmcTRefBw = 0x0000031c; +SDRAM[3].EmcFbioCfg5 = 0x9160a00d; +SDRAM[3].EmcFbioCfg7 = 0x00003bbf; +SDRAM[3].EmcFbioCfg8 = 0x0cf30000; +SDRAM[3].EmcCmdMappingCmd0_0 = 0x07050203; +SDRAM[3].EmcCmdMappingCmd0_1 = 0x06041b1c; +SDRAM[3].EmcCmdMappingCmd0_2 = 0x05252523; +SDRAM[3].EmcCmdMappingCmd1_0 = 0x1e0d0b0a; +SDRAM[3].EmcCmdMappingCmd1_1 = 0x240c091d; +SDRAM[3].EmcCmdMappingCmd1_2 = 0x04262608; +SDRAM[3].EmcCmdMappingCmd2_0 = 0x051b0302; +SDRAM[3].EmcCmdMappingCmd2_1 = 0x0604231c; +SDRAM[3].EmcCmdMappingCmd2_2 = 0x09252507; +SDRAM[3].EmcCmdMappingCmd3_0 = 0x0c0b0d0a; +SDRAM[3].EmcCmdMappingCmd3_1 = 0x08091e1d; +SDRAM[3].EmcCmdMappingCmd3_2 = 0x08262624; +SDRAM[3].EmcCmdMappingByte = 0x0a270623; +SDRAM[3].EmcFbioSpare = 0x00000012; +SDRAM[3].EmcCfgRsv = 0xff00ff00; +SDRAM[3].EmcMrs = 0x00000000; +SDRAM[3].EmcEmrs = 0x00000000; +SDRAM[3].EmcEmrs2 = 0x00000000; +SDRAM[3].EmcEmrs3 = 0x00000000; +SDRAM[3].EmcMrw1 = 0x08010004; +SDRAM[3].EmcMrw2 = 0x08020000; +SDRAM[3].EmcMrw3 = 0x080d0000; +SDRAM[3].EmcMrw4 = 0xc0000000; +SDRAM[3].EmcMrw6 = 0x08037171; +SDRAM[3].EmcMrw8 = 0x080b0000; +SDRAM[3].EmcMrw9 = 0x0c0e7272; +SDRAM[3].EmcMrw10 = 0x00000000; +SDRAM[3].EmcMrw12 = 0x0c0d0808; +SDRAM[3].EmcMrw13 = 0x0c0d0000; +SDRAM[3].EmcMrw14 = 0x08161414; +SDRAM[3].EmcMrwExtra = 0x08010004; +SDRAM[3].EmcWarmBootMrwExtra = 0x08110000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000001; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x00cc0015; +SDRAM[3].EmcMrsWaitCnt2 = 0x0033000a; +SDRAM[3].EmcCfg = 0xf3200000; +SDRAM[3].EmcCfg2 = 0x00110805; +SDRAM[3].EmcCfgPipe = 0x0fff0fff; +SDRAM[3].EmcCfgPipeClk = 0x00000000; +SDRAM[3].EmcFdpdCtrlCmdNoRamp = 0x00000001; +SDRAM[3].EmcCfgUpdate = 0x70000301; +SDRAM[3].EmcDbg = 0x01000c00; +SDRAM[3].EmcDbgWriteMux = 0x00000001; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x80000713; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcCfgDigDll = 0x002c00a0; +SDRAM[3].EmcCfgDigDll_1 = 0x00003701; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcDevSelect = 0x00000000; +SDRAM[3].EmcSelDpdCtrl = 0x00040008; +SDRAM[3].EmcFdpdCtrlDq = 0x8020221f; +SDRAM[3].EmcFdpdCtrlCmd = 0x0220f40f; +SDRAM[3].EmcPmacroIbVrefDq_0 = 0x28282828; +SDRAM[3].EmcPmacroIbVrefDq_1 = 0x28282828; +SDRAM[3].EmcPmacroIbVrefDqs_0 = 0x11111111; +SDRAM[3].EmcPmacroIbVrefDqs_1 = 0x11111111; +SDRAM[3].EmcPmacroIbRxrt = 0x000000be; +SDRAM[3].EmcCfgPipe1 = 0x0fff0fff; +SDRAM[3].EmcCfgPipe2 = 0x0fff0fff; +SDRAM[3].EmcPmacroQuseDdllRank0_0 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank0_1 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank0_2 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank0_3 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank0_4 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank0_5 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_0 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_1 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_2 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_3 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_4 = 0x00000000; +SDRAM[3].EmcPmacroQuseDdllRank1_5 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank0_0 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank0_1 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank0_2 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank0_3 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank0_4 = 0x00120010; +SDRAM[3].EmcPmacroObDdllLongDqRank0_5 = 0x00120011; +SDRAM[3].EmcPmacroObDdllLongDqRank1_0 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank1_1 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank1_2 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank1_3 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqRank1_4 = 0x00120010; +SDRAM[3].EmcPmacroObDdllLongDqRank1_5 = 0x00120011; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_0 = 0x00280027; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_1 = 0x0025002a; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_2 = 0x002a002a; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_3 = 0x00260026; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_4 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqsRank0_5 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_0 = 0x00280027; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_1 = 0x0025002a; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_2 = 0x002a002a; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_3 = 0x00260026; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_4 = 0x00000000; +SDRAM[3].EmcPmacroObDdllLongDqsRank1_5 = 0x00000000; +SDRAM[3].EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028; +SDRAM[3].EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028; +SDRAM[3].EmcPmacroDdllLongCmd_0 = 0x00100010; +SDRAM[3].EmcPmacroDdllLongCmd_1 = 0x00120012; +SDRAM[3].EmcPmacroDdllLongCmd_2 = 0x00110011; +SDRAM[3].EmcPmacroDdllLongCmd_3 = 0x00120012; +SDRAM[3].EmcPmacroDdllLongCmd_4 = 0x00000010; +SDRAM[3].EmcPmacroDdllShortCmd_0 = 0x00000000; +SDRAM[3].EmcPmacroDdllShortCmd_1 = 0x00000000; +SDRAM[3].EmcPmacroDdllShortCmd_2 = 0x00000000; +SDRAM[3].WarmBootWait = 0x00000001; +SDRAM[3].EmcOdtWrite = 0x00000000; +SDRAM[3].EmcZcalInterval = 0x00064000; +SDRAM[3].EmcZcalWaitCnt = 0x000900cc; +SDRAM[3].EmcZcalMrwCmd = 0x0051004f; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcZcalInitDev0 = 0x80000001; +SDRAM[3].EmcZcalInitDev1 = 0x40000001; +SDRAM[3].EmcZcalInitWait = 0x00000001; +SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZqCalLpDdr4WarmBoot = 0x00000001; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrsExtra = 0x00000000; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000001; +SDRAM[3].PmcVddpSelWait = 0x00000002; +SDRAM[3].PmcDdrPwr = 0x0000000f; +SDRAM[3].PmcDdrCfg = 0x20120100; +SDRAM[3].PmcIoDpd3Req = 0x4befffff; +SDRAM[3].PmcIoDpd3ReqWait = 0x00000001; +SDRAM[3].PmcIoDpd4ReqWait = 0x00000002; +SDRAM[3].PmcRegShort = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].PmcDdrCntrlWait = 0x00000000; +SDRAM[3].PmcDdrCntrl = 0x0007ff8b; +SDRAM[3].EmcAcpdControl = 0x00000000; +SDRAM[3].EmcSwizzleRank0Byte0 = 0x73245601; +SDRAM[3].EmcSwizzleRank0Byte1 = 0x56243701; +SDRAM[3].EmcSwizzleRank0Byte2 = 0x32574610; +SDRAM[3].EmcSwizzleRank0Byte3 = 0x23456710; +SDRAM[3].EmcSwizzleRank1Byte0 = 0x72345601; +SDRAM[3].EmcSwizzleRank1Byte1 = 0x23456701; +SDRAM[3].EmcSwizzleRank1Byte2 = 0x54673210; +SDRAM[3].EmcSwizzleRank1Byte3 = 0x54623710; +SDRAM[3].EmcTxdsrvttgen = 0x00000000; +SDRAM[3].EmcDataBrlshft0 = 0x00249249; +SDRAM[3].EmcDataBrlshft1 = 0x00249249; +SDRAM[3].EmcDqsBrlshft0 = 0x00000000; +SDRAM[3].EmcDqsBrlshft1 = 0x00000000; +SDRAM[3].EmcCmdBrlshft0 = 0x00000000; +SDRAM[3].EmcCmdBrlshft1 = 0x00000000; +SDRAM[3].EmcCmdBrlshft2 = 0x00000012; +SDRAM[3].EmcCmdBrlshft3 = 0x00000012; +SDRAM[3].EmcQuseBrlshft0 = 0x00000000; +SDRAM[3].EmcQuseBrlshft1 = 0x00000000; +SDRAM[3].EmcQuseBrlshft2 = 0x00000000; +SDRAM[3].EmcQuseBrlshft3 = 0x00000000; +SDRAM[3].EmcDllCfg0 = 0x1f13412f; +SDRAM[3].EmcDllCfg1 = 0x00010014; +SDRAM[3].EmcPmcScratch1 = 0x4befffff; +SDRAM[3].EmcPmcScratch2 = 0x7fffffff; +SDRAM[3].EmcPmcScratch3 = 0x4005d70b; +SDRAM[3].EmcPmacroPadCfgCtrl = 0x00020000; +SDRAM[3].EmcPmacroVttgenCtrl0 = 0x00030808; +SDRAM[3].EmcPmacroVttgenCtrl1 = 0x00015c00; +SDRAM[3].EmcPmacroVttgenCtrl2 = 0x00101010; +SDRAM[3].EmcPmacroBrickCtrlRfu1 = 0x00001600; +SDRAM[3].EmcPmacroCmdBrickCtrlFdpd = 0x00000000; +SDRAM[3].EmcPmacroBrickCtrlRfu2 = 0x00000000; +SDRAM[3].EmcPmacroDataBrickCtrlFdpd = 0x00000000; +SDRAM[3].EmcPmacroBgBiasCtrl0 = 0x00000034; +SDRAM[3].EmcPmacroDataPadRxCtrl = 0x00050037; +SDRAM[3].EmcPmacroCmdPadRxCtrl = 0x00000000; +SDRAM[3].EmcPmacroDataRxTermMode = 0x00000010; +SDRAM[3].EmcPmacroCmdRxTermMode = 0x00003000; +SDRAM[3].EmcPmacroDataPadTxCtrl = 0x02000111; +SDRAM[3].EmcPmacroCommonPadTxCtrl = 0x00000008; +SDRAM[3].EmcPmacroCmdPadTxCtrl = 0x0a000000; +SDRAM[3].EmcCfg3 = 0x00000040; +SDRAM[3].EmcPmacroTxPwrd0 = 0x10000000; +SDRAM[3].EmcPmacroTxPwrd1 = 0x08000000; +SDRAM[3].EmcPmacroTxPwrd2 = 0x10000000; +SDRAM[3].EmcPmacroTxPwrd3 = 0x08000000; +SDRAM[3].EmcPmacroTxPwrd4 = 0x00000000; +SDRAM[3].EmcPmacroTxPwrd5 = 0x00000000; +SDRAM[3].EmcConfigSampleDelay = 0x00000020; +SDRAM[3].EmcPmacroBrickMapping0 = 0x28190081; +SDRAM[3].EmcPmacroBrickMapping1 = 0x44853293; +SDRAM[3].EmcPmacroBrickMapping2 = 0x76a76a5b; +SDRAM[3].EmcPmacroTxSelClkSrc0 = 0x00000000; +SDRAM[3].EmcPmacroTxSelClkSrc1 = 0x00000000; +SDRAM[3].EmcPmacroTxSelClkSrc2 = 0x00000000; +SDRAM[3].EmcPmacroTxSelClkSrc3 = 0x00000000; +SDRAM[3].EmcPmacroTxSelClkSrc4 = 0x00000000; +SDRAM[3].EmcPmacroTxSelClkSrc5 = 0x00000000; +SDRAM[3].EmcPmacroDdllBypass = 0xefffefff; +SDRAM[3].EmcPmacroDdllPwrd0 = 0xc0c0c0c0; +SDRAM[3].EmcPmacroDdllPwrd1 = 0xc0c0c0c0; +SDRAM[3].EmcPmacroDdllPwrd2 = 0xdcdcdcdc; +SDRAM[3].EmcPmacroCmdCtrl0 = 0x0a0a0a0a; +SDRAM[3].EmcPmacroCmdCtrl1 = 0x0a0a0a0a; +SDRAM[3].EmcPmacroCmdCtrl2 = 0x0a0a0a0a; +SDRAM[3].McEmemAdrCfg = 0x00000001; +SDRAM[3].McEmemAdrCfgDev0 = 0x00070302; +SDRAM[3].McEmemAdrCfgDev1 = 0x00070302; +SDRAM[3].McEmemAdrCfgChannelMask = 0xffff2400; +SDRAM[3].McEmemAdrCfgBankMask0 = 0x6e574400; +SDRAM[3].McEmemAdrCfgBankMask1 = 0x39722800; +SDRAM[3].McEmemAdrCfgBankMask2 = 0x4b9c1000; +SDRAM[3].McEmemCfg = 0x00001000; +SDRAM[3].McEmemArbCfg = 0x08000001; +SDRAM[3].McEmemArbOutstandingReq = 0x8000004c; +SDRAM[3].McEmemArbRefpbHpCtrl = 0x000a1020; +SDRAM[3].McEmemArbRefpbBankCtrl = 0x80001028; +SDRAM[3].McEmemArbTimingRcd = 0x00000001; +SDRAM[3].McEmemArbTimingRp = 0x00000000; +SDRAM[3].McEmemArbTimingRc = 0x00000003; +SDRAM[3].McEmemArbTimingRas = 0x00000001; +SDRAM[3].McEmemArbTimingFaw = 0x00000002; +SDRAM[3].McEmemArbTimingRrd = 0x00000001; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[3].McEmemArbTimingWap2Pre = 0x00000005; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000001; +SDRAM[3].McEmemArbTimingR2W = 0x00000004; +SDRAM[3].McEmemArbTimingW2R = 0x00000005; +SDRAM[3].McEmemArbTimingRFCPB = 0x00000004; +SDRAM[3].McEmemArbDaTurns = 0x02020001; +SDRAM[3].McEmemArbDaCovers = 0x00030201; +SDRAM[3].McEmemArbMisc0 = 0x71c30504; +SDRAM[3].McEmemArbMisc1 = 0x70000f0f; +SDRAM[3].McEmemArbMisc2 = 0x00000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x10000000; +SDRAM[3].McEmemArbOverride1 = 0x00000000; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McDaCfg0 = 0x00000001; +SDRAM[3].McEmemArbTimingCcdmw = 0x00000008; +SDRAM[3].McClkenOverride = 0x00008000; +SDRAM[3].McStatControl = 0x00000000; +SDRAM[3].McVideoProtectBom = 0xfff00000; +SDRAM[3].McVideoProtectBomAdrHi = 0x00000000; +SDRAM[3].McVideoProtectSizeMb = 0x00000000; +SDRAM[3].McVideoProtectVprOverride = 0xe4bac343; +SDRAM[3].McVideoProtectVprOverride1 = 0x00001ed3; +SDRAM[3].McVideoProtectGpuOverride0 = 0x00000000; +SDRAM[3].McVideoProtectGpuOverride1 = 0x00000000; +SDRAM[3].McSecCarveoutBom = 0xfff00000; +SDRAM[3].McSecCarveoutAdrHi = 0x00000000; +SDRAM[3].McSecCarveoutSizeMb = 0x00000000; +SDRAM[3].McVideoProtectWriteAccess = 0x00000000; +SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[3].McGeneralizedCarveout1Bom = 0x00000000; +SDRAM[3].McGeneralizedCarveout1BomHi = 0x00000000; +SDRAM[3].McGeneralizedCarveout1Size128kb = 0x00000008; +SDRAM[3].McGeneralizedCarveout1Access0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1Access1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1Access2 = 0x00300000; +SDRAM[3].McGeneralizedCarveout1Access3 = 0x03000000; +SDRAM[3].McGeneralizedCarveout1Access4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout1Cfg0 = 0x04000c76; +SDRAM[3].McGeneralizedCarveout2Bom = 0x00000000; +SDRAM[3].McGeneralizedCarveout2BomHi = 0x00000000; +SDRAM[3].McGeneralizedCarveout2Size128kb = 0x00000002; +SDRAM[3].McGeneralizedCarveout2Access0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2Access1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2Access2 = 0x03000000; +SDRAM[3].McGeneralizedCarveout2Access3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2Access4 = 0x00000300; +SDRAM[3].McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout2Cfg0 = 0x0440167e; +SDRAM[3].McGeneralizedCarveout3Bom = 0x00000000; +SDRAM[3].McGeneralizedCarveout3BomHi = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Size128kb = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Access0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Access1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Access2 = 0x03000000; +SDRAM[3].McGeneralizedCarveout3Access3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Access4 = 0x00000300; +SDRAM[3].McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout3Cfg0 = 0x04401e7e; +SDRAM[3].McGeneralizedCarveout4Bom = 0x00000000; +SDRAM[3].McGeneralizedCarveout4BomHi = 0x00000000; +SDRAM[3].McGeneralizedCarveout4Size128kb = 0x00000008; +SDRAM[3].McGeneralizedCarveout4Access0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4Access1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4Access2 = 0x00300000; +SDRAM[3].McGeneralizedCarveout4Access3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4Access4 = 0x000000c0; +SDRAM[3].McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout4Cfg0 = 0x04002446; +SDRAM[3].McGeneralizedCarveout5Bom = 0x00000000; +SDRAM[3].McGeneralizedCarveout5BomHi = 0x00000000; +SDRAM[3].McGeneralizedCarveout5Size128kb = 0x00000008; +SDRAM[3].McGeneralizedCarveout5Access0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5Access1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5Access2 = 0x00300000; +SDRAM[3].McGeneralizedCarveout5Access3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5Access4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000; +SDRAM[3].McGeneralizedCarveout5Cfg0 = 0x04002c46; +SDRAM[3].EmcCaTrainingEnable = 0x00000000; +SDRAM[3].SwizzleRankByteEncode = 0x0000002a; +SDRAM[3].BootRomPatchControl = 0x00000000; +SDRAM[3].BootRomPatchData = 0x00000000; +SDRAM[3].McMtsCarveoutBom = 0xfff00000; +SDRAM[3].McMtsCarveoutAdrHi = 0x00000000; +SDRAM[3].McMtsCarveoutSizeMb = 0x00000000; +SDRAM[3].McMtsCarveoutRegCtrl = 0x00000000; diff --git a/tegra210/nvidia/p2371-2180/build.sh b/tegra210/nvidia/p2371-2180/build.sh new file mode 100755 index 000000000000..7dc6a05f81d5 --- /dev/null +++ b/tegra210/nvidia/p2371-2180/build.sh @@ -0,0 +1,21 @@ +#!/bin/sh + +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +make diff --git a/tegra210/nvidia/p2371-2180/p2371-2180-emmc.img.cfg b/tegra210/nvidia/p2371-2180/p2371-2180-emmc.img.cfg new file mode 100644 index 000000000000..5c7b939a5c55 --- /dev/null +++ b/tegra210/nvidia/p2371-2180/p2371-2180-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00400001; +Bctcopy = 1; +Bctfile = P2180_A00_LP4_DSC_204Mhz.bct; +BootLoader = nvtboot.bin,0x40010000,0x40010000,Complete;