@@ -454,8 +454,7 @@ static struct tegra_clk_pll_params pll_d_params = {
.lock_delay = 1000,
.div_nmp = &pllp_nmp,
.freq_table = pll_d_freq_table,
- .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
- TEGRA_PLL_USE_LOCK,
+ .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON,
};
static struct tegra_clk_pll_params pll_d2_params = {
@@ -472,8 +471,7 @@ static struct tegra_clk_pll_params pll_d2_params = {
.lock_delay = 1000,
.div_nmp = &pllp_nmp,
.freq_table = pll_d_freq_table,
- .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
- TEGRA_PLL_USE_LOCK,
+ .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON,
};
static struct pdiv_map pllu_p[] = {