diff mbox

[flasher] Fix comment re: meaning of 0x00108000 constant

Message ID 1438805558-461-1-git-send-email-swarren@wwwdotorg.org
State Accepted, archived
Headers show

Commit Message

Stephen Warren Aug. 5, 2015, 8:12 p.m. UTC 
From: Stephen Warren <swarren@nvidia.com>

This is the SPL base (which is essentially constant), not the base of
the main CCPLEX binary (which varies according to the size needs of the
SPL image).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 tegra-uboot-flasher | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Stephen Warren Aug. 5, 2015, 8:13 p.m. UTC | #1 
On 08/05/2015 02:12 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> This is the SPL base (which is essentially constant), not the base of
> the main CCPLEX binary (which varies according to the size needs of the
> SPL image).

I've applied this.

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diff mbox

Patch

diff --git a/tegra-uboot-flasher b/tegra-uboot-flasher
index d80aa0d48673..4809665d4a6a 100755
--- a/tegra-uboot-flasher
+++ b/tegra-uboot-flasher
@@ -87,7 +87,7 @@  gen_flashcmds = {
 }
 
 def get_loadaddr():
-    # 0x00108000 is CONFIG_SYS_TEXT_BASE in U-Boot, minus RAM base
+    # 0x00108000 is CONFIG_SPL_TEXT_BASE in U-Boot, minus RAM base
     return soc['ram-base'] + 0x00108000
 
 def gen_tegrarcm_cmd(bootloader, loadaddr):