From patchwork Thu May 21 13:20:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arto Merilainen X-Patchwork-Id: 475029 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id BCE0014012C for ; Thu, 21 May 2015 23:30:51 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756139AbbEUNau (ORCPT ); Thu, 21 May 2015 09:30:50 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:8231 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755806AbbEUNWJ (ORCPT ); Thu, 21 May 2015 09:22:09 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Thu, 21 May 2015 06:21:36 -0700 Received: from hqemhub02.nvidia.com ([172.20.150.31]) by hqnvupgp07.nvidia.com (PGP Universal service); Thu, 21 May 2015 06:20:07 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 21 May 2015 06:20:07 -0700 Received: from dhcp-10-21-25-165.Nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.342.0; Thu, 21 May 2015 06:22:08 -0700 From: Arto Merilainen To: thierry.reding@gmail.com CC: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, achew@nvidia.com, srasal@nvidia.com, dnibade@nvidia.com Subject: [PATCH 4/4] ARM: tegra: Add VIC for Tegra124 Date: Thu, 21 May 2015 16:20:25 +0300 Message-ID: <1432214425-27137-5-git-send-email-amerilainen@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1432214425-27137-1-git-send-email-amerilainen@nvidia.com> References: <1432214425-27137-1-git-send-email-amerilainen@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch adds VIC device tree node for Video Image Compositor. Signed-off-by: Arto Merilainen --- arch/arm/boot/dts/tegra124.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 13cc7ca5e031..626355693a41 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -136,6 +136,17 @@ status = "disabled"; }; + vic@54340000 { + compatible = "nvidia,tegra124-vic"; + reg = <0x0 0x54340000 0x0 0x00040000>; + clocks = <&tegra_car TEGRA124_CLK_VIC03>; + clock-names = "vic03"; + resets = <&tegra_car TEGRA124_CLK_VIC03>; + reset-names = "vic03"; + + iommus = <&mc TEGRA_SWGROUP_VIC>; + }; + sor@0,54540000 { compatible = "nvidia,tegra124-sor"; reg = <0x0 0x54540000 0x0 0x00040000>;