From patchwork Mon May 4 16:37:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rhyland Klein X-Patchwork-Id: 467720 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 836FF14007F for ; Tue, 5 May 2015 02:41:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751932AbbEDQjO (ORCPT ); Mon, 4 May 2015 12:39:14 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:19373 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751853AbbEDQjB (ORCPT ); Mon, 4 May 2015 12:39:01 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Mon, 04 May 2015 09:38:27 -0700 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Mon, 04 May 2015 09:37:37 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 04 May 2015 09:37:37 -0700 Received: from rklein-work.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.342.0; Mon, 4 May 2015 09:39:00 -0700 From: Rhyland Klein To: Peter De Schrijver CC: Mike Turquette , Stephen Warren , Stephen Boyd , Thierry Reding , Alexandre Courbot , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Rhyland Klein Subject: [PATCH v4 05/20] clk: tegra: pll: update warning msg Date: Mon, 4 May 2015 12:37:25 -0400 Message-ID: <1430757460-9478-6-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1430757460-9478-1-git-send-email-rklein@nvidia.com> References: <1430757460-9478-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Swap out the generic WARN_ON with a WARN which gives more information about what is happening. Signed-off-by: Rhyland Klein Reviewed-by: Benson Leung --- drivers/clk/tegra/clk-pll.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 1e1018dd466f..0282d9f4f2d7 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -692,7 +692,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, pdiv = _hw_to_p_div(hw, cfg.p); if (pdiv < 0) { - WARN_ON(1); + WARN(1, "Clock %s has invalid pdiv value : 0x%x\n", + __clk_get_name(hw->clk), cfg.p); pdiv = 1; }