From patchwork Thu Apr 2 15:00:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 457705 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0325E14009B for ; Fri, 3 Apr 2015 02:01:19 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=PnkgHVMP; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752468AbbDBPBR (ORCPT ); Thu, 2 Apr 2015 11:01:17 -0400 Received: from mail-wg0-f41.google.com ([74.125.82.41]:34013 "EHLO mail-wg0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752922AbbDBPBP (ORCPT ); Thu, 2 Apr 2015 11:01:15 -0400 Received: by wgbdm7 with SMTP id dm7so88314152wgb.1; Thu, 02 Apr 2015 08:01:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=molPcMGQVc8O8BVY+WFphCpey3TqRXmyqn6cJ/Pmjm0=; b=PnkgHVMPN6oFniL6gcFVTmdYM2iduFj1IAaCP+S322WXMDMGUtvE5fQkNN1il6psWp BasTfmFCGeWOnZ6GuyQScuauIi5JLnzy947nKIduB3lip/941PA5iAUJhk0JHvipiXS8 mJVGkWstFePAzO1YBRL+aiZwMXrpJqMFZs6Ji4RSrMhqVdhHO4uFc8jkF3AEUxYZT2PG +vcFJh/WGCGubKbmq/BZy2XjTtDkZKnSxO74ir6KigfxMdyrHohxQHEx4jQyI/rqMsqQ +BXVmDGtrjbmqCRP83ENf7sgE8W3XAutl05DuKI73p79EfuSm1C2sAEcZpGByUWDtaC7 wJrQ== X-Received: by 10.194.77.230 with SMTP id v6mr96522398wjw.25.1427986873846; Thu, 02 Apr 2015 08:01:13 -0700 (PDT) Received: from cizrna.lan ([109.72.12.93]) by mx.google.com with ESMTPSA id i8sm8064876wiy.23.2015.04.02.08.01.11 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Apr 2015 08:01:12 -0700 (PDT) From: Tomeu Vizoso To: linux-tegra@vger.kernel.org Cc: Tomeu Vizoso , Mikko Perttunen , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Stephen Warren , Thierry Reding , Alexandre Courbot , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] ARM: tegra: Correct which USB controller has the UTMI pad registers Date: Thu, 2 Apr 2015 17:00:42 +0200 Message-Id: <1427986842-21409-1-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.3.4 In-Reply-To: <551D57E0.7050102@kapsi.fi> References: <551D57E0.7050102@kapsi.fi> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org It should be the first controller, not the second. This broke USB after 6261b06 ("regulator: Defer lookup of supply to regulator_get"), because it changed the order in which the controllers were probed. The fix for this issue was suggested by Mikko Perttunen. Signed-off-by: Tomeu Vizoso Cc: Mikko Perttunen Reviewed-by: Mikko Perttunen --- I think that the line numbers should be enough in this case, as I expect this to be merged soon, but just in case I'm sending the same patch with plenty of context. Regards, Tomeu --- arch/arm/boot/dts/tegra124.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index cf01c81..cb786a9 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -821,77 +821,77 @@ compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d000000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USBD>, <&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_USBD>; clock-names = "reg", "pll_u", "utmi-pads"; resets = <&tegra_car 59>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; nvidia,elastic-limit = <16>; nvidia,term-range-adj = <6>; nvidia,xcvr-setup = <9>; nvidia,xcvr-lsfslew = <0>; nvidia,xcvr-lsrslew = <3>; nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,has-utmi-pad-registers; status = "disabled"; }; usb@0,7d004000 { compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci"; reg = <0x0 0x7d004000 0x0 0x4000>; interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB2>; resets = <&tegra_car 58>; reset-names = "usb"; nvidia,phy = <&phy2>; status = "disabled"; }; phy2: usb-phy@0,7d004000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d004000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB2>, <&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_USBD>; clock-names = "reg", "pll_u", "utmi-pads"; resets = <&tegra_car 22>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; nvidia,elastic-limit = <16>; nvidia,term-range-adj = <6>; nvidia,xcvr-setup = <9>; nvidia,xcvr-lsfslew = <0>; nvidia,xcvr-lsrslew = <3>; nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; - nvidia,has-utmi-pad-registers; status = "disabled"; }; usb@0,7d008000 { compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci"; reg = <0x0 0x7d008000 0x0 0x4000>; interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB3>; resets = <&tegra_car 59>; reset-names = "usb"; nvidia,phy = <&phy3>; status = "disabled"; }; phy3: usb-phy@0,7d008000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d008000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; phy_type = "utmi";