From patchwork Tue Mar 17 09:36:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 450918 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 530BA140172 for ; Tue, 17 Mar 2015 20:40:13 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=tkIiVCqz; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934098AbbCQJjm (ORCPT ); Tue, 17 Mar 2015 05:39:42 -0400 Received: from mail-wi0-f182.google.com ([209.85.212.182]:38295 "EHLO mail-wi0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932831AbbCQJhV (ORCPT ); Tue, 17 Mar 2015 05:37:21 -0400 Received: by wifj2 with SMTP id j2so5762041wif.1; Tue, 17 Mar 2015 02:37:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=AZ2JeX6/yj7PF8Xgd4GN3RuH5qQ+ryPDxM1CzSOmj7c=; b=tkIiVCqzqMYr5yPU2f9wiqEkq9vleYfnXkbRUCjm4yqubTeHbzSvmP8vAQ+mXM2F9x Q/Vjw86wJd08gQPcj/njUD9IBqaDk/lBFnyuOtiZvPxbMoHLtHmBSP4hzaIpb+SZjgGL uF3C01LXorNwBtP1z/O0eH6RfnLlEMqZnE+rX0qZUXTlXaN3NBbjnp/nt3xXuuSsgh/6 wJrWLzdqPU+9pdbie7GcP6DBywQh0u5cU9Jgc5VaYHXL03QiniluOTcMQ8A5Vp2mTTCp d01Pv5g4oMsCRBHqsDSYlgJVtFZ3uroyIZPjOdD+QkzYOERNQGkWPZYI6MvdGtC4nkPt WSdg== X-Received: by 10.194.243.1 with SMTP id wu1mr133675469wjc.69.1426585039457; Tue, 17 Mar 2015 02:37:19 -0700 (PDT) Received: from cizrna.lan ([109.72.12.78]) by mx.google.com with ESMTPSA id q10sm19113700wjr.41.2015.03.17.02.37.17 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Mar 2015 02:37:18 -0700 (PDT) From: Tomeu Vizoso To: linux-tegra@vger.kernel.org Cc: Mikko Perttunen , Tomeu Vizoso , MyungJoo Ham , Kyungmin Park , Stephen Warren , Thierry Reding , Alexandre Courbot , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/8] PM / devfreq: tegra: Use clock rate constraints Date: Tue, 17 Mar 2015 10:36:14 +0100 Message-Id: <1426584991-11110-5-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1426584991-11110-1-git-send-email-tomeu.vizoso@collabora.com> References: <1426584991-11110-1-git-send-email-tomeu.vizoso@collabora.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Now that we have per-user clocks and the possibility to set constraints in a clock, set a floor constraint on the EMC clock. Signed-off-by: Tomeu Vizoso --- drivers/devfreq/tegra-devfreq.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c index c71635a..5a6164c 100644 --- a/drivers/devfreq/tegra-devfreq.c +++ b/drivers/devfreq/tegra-devfreq.c @@ -497,10 +497,8 @@ static int tegra_devfreq_target(struct device *dev, unsigned long *freq, rate = dev_pm_opp_get_freq(opp); rcu_read_unlock(); - /* TODO: Once we have per-user clk constraints, set a floor */ - clk_set_rate(tegra->emc_clock, rate); - - /* TODO: Set voltage as well */ + clk_set_min_rate(tegra->emc_clock, rate); + clk_set_rate(tegra->emc_clock, 0); return 0; } @@ -619,7 +617,6 @@ static int tegra_devfreq_probe(struct platform_device *pdev) struct tegra_devfreq *tegra; struct tegra_devfreq_device *dev; struct resource *res; - unsigned long max_freq; unsigned int i; int irq; int err; @@ -658,6 +655,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev) return err; } + clk_set_rate(tegra->emc_clock, ULONG_MAX); + tegra->rate_change_nb.notifier_call = tegra_actmon_rate_notify_cb; err = clk_notifier_register(tegra->emc_clock, &tegra->rate_change_nb); if (err) { @@ -677,11 +676,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev) reset_control_deassert(tegra->reset); - max_freq = clk_round_rate(tegra->emc_clock, ULONG_MAX); - tegra->max_freq = max_freq / KHZ; - - clk_set_rate(tegra->emc_clock, max_freq); - + tegra->max_freq = clk_round_rate(tegra->emc_clock, ULONG_MAX) / KHZ; tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ; actmon_writel(tegra, ACTMON_SAMPLING_PERIOD - 1,