From patchwork Tue Sep 2 21:35:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 385330 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 012CA14011D for ; Wed, 3 Sep 2014 07:41:51 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755226AbaIBVlt (ORCPT ); Tue, 2 Sep 2014 17:41:49 -0400 Received: from mail-ob0-f202.google.com ([209.85.214.202]:63622 "EHLO mail-ob0-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751633AbaIBVls (ORCPT ); Tue, 2 Sep 2014 17:41:48 -0400 Received: by mail-ob0-f202.google.com with SMTP id wp18so1307597obc.5 for ; Tue, 02 Sep 2014 14:41:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fMJNN/rrbxPwkq6XqCyacBc+RHimInqvS9rZPv9jPW0=; b=ZG/wYU7wOHGvj8NiVo3olwBS3vGvCN8z1v1JcbvTG/Dsy6HyVulAqW2jnu+4rpyz3S bJIsZA4sAtE/pNvRPtq4yWRvMGTlpOmtVasNo4adtwvweGAO/wEbf6X7s1+IfDD1mELk IJ7k4VKmBmxm2LveupTllDlnRnIMhhLjzxZUIouimZsYWhvi32mtJIrCINzyLpq3kUYp Ga+TpTRL97vbI/OaYDPWDQsp/PQorJhuHKhsv5vc4E6OooW38ekJ12kdoHUDjatKblye MA4cvGjyUKR/ADDvua/yt97Ma1yfg9w66+kSgCEoulqijlSGvFdqERujf1vePgmEqNnx 9Psw== X-Gm-Message-State: ALoCoQllKbraugaUFsBcpgLEYXlv+cC0peEpSfKm9XAtvzXb5+WAQ3Chh3QGrjeMz5U7B9aocNBu X-Received: by 10.182.246.70 with SMTP id xu6mr21258886obc.31.1409693709960; Tue, 02 Sep 2014 14:35:09 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id j25si718135yhb.0.2014.09.02.14.35.09 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 02 Sep 2014 14:35:09 -0700 (PDT) Received: from abrestic.mtv.corp.google.com (abrestic.mtv.corp.google.com [172.22.65.70]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 7D0515A433A; Tue, 2 Sep 2014 14:35:09 -0700 (PDT) Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 4077A220570; Tue, 2 Sep 2014 14:35:09 -0700 (PDT) From: Andrew Bresticker To: Stephen Warren , Thierry Reding , linux-tegra@vger.kernel.org Cc: Andrew Bresticker , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Jassi Brar , Linus Walleij , Greg Kroah-Hartman , Mathias Nyman , Grant Likely , Alan Stern , Arnd Bergmann , Kishon Vijay Abraham I , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org Subject: [PATCH v3 9/9] ARM: tegra: venice2: Add xHCI support Date: Tue, 2 Sep 2014 14:35:01 -0700 Message-Id: <1409693701-16520-10-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1409693701-16520-1-git-send-email-abrestic@chromium.org> References: <1409693701-16520-1-git-send-email-abrestic@chromium.org> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Assign ports previously owned by the EHCI controllers to the xHCI controller. There are two external USB ports (UTMI ports 0/2 and USB3 ports 0/1) and an internal USB port (UTMI port 1). PCIe lanes 0 and 1 are used by the USB3 ports. Signed-off-by: Andrew Bresticker --- Changes from v2: - Updated VBUS power supply names. Changes from v1: - Updated USB power supplies. --- arch/arm/boot/dts/tegra124-venice2.dts | 79 ++++++++++++++++++++++------------ 1 file changed, 51 insertions(+), 28 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 70ad91d..1cc3be2 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -736,7 +736,7 @@ regulator-always-on; }; - ldo0 { + avdd_1v05_run: ldo0 { regulator-name = "+1.05V_RUN_AVDD"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; @@ -878,6 +878,56 @@ status = "okay"; }; + usb@0,70090000 { + status = "okay"; + phys = <&padctl TEGRA_XUSB_PADCTL_UTMI_P0>, /* 1st USB A */ + <&padctl TEGRA_XUSB_PADCTL_UTMI_P1>, /* Internal USB */ + <&padctl TEGRA_XUSB_PADCTL_UTMI_P2>, /* 2nd USB A */ + <&padctl TEGRA_XUSB_PADCTL_USB3_P0>, /* 1st USB A */ + <&padctl TEGRA_XUSB_PADCTL_USB3_P1>; /* 2nd USB A */ + phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-0", "usb3-1"; + avddio-pex-supply = <&vdd_1v05_run>; + dvddio-pex-supply = <&vdd_1v05_run>; + avdd-usb-supply = <&vdd_3v3_lp0>; + avdd-pll-utmip-supply = <&vddio_1v8>; + avdd-pll-erefe-supply = <&avdd_1v05_run>; + avdd-pex-pll-supply = <&vdd_1v05_run>; + hvdd-pex-supply = <&vdd_3v3_lp0>; + hvdd-pex-plle-supply = <&vdd_3v3_lp0>; + }; + + padctl@0,7009f000 { + pinctrl-0 = <&padctl_default>; + pinctrl-names = "default"; + + vbus-0-supply = <&vdd_usb1_vbus>; + vbus-1-supply = <&vdd_run_cam>; + vbus-2-supply = <&vdd_usb3_vbus>; + nvidia,usb3-port-0-lane = ; + nvidia,usb3-port-1-lane = ; + + padctl_default: pinmux { + otg { + nvidia,lanes = "otg-0", "otg-1", "otg-2"; + nvidia,function = "xusb"; + }; + + usb3p0 { + nvidia,lanes = "pcie-0"; + nvidia,function = "usb3"; + nvidia,iddq = <0>; + nvidia,usb2-port-num = <0>; + }; + + usb3p1 { + nvidia,lanes = "pcie-1"; + nvidia,function = "usb3"; + nvidia,iddq = <0>; + nvidia,usb2-port-num = <2>; + }; + }; + }; + sdhci@0,700b0400 { cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; @@ -898,33 +948,6 @@ }; }; - usb@0,7d000000 { - status = "okay"; - }; - - usb-phy@0,7d000000 { - status = "okay"; - vbus-supply = <&vdd_usb1_vbus>; - }; - - usb@0,7d004000 { - status = "okay"; - }; - - usb-phy@0,7d004000 { - status = "okay"; - vbus-supply = <&vdd_run_cam>; - }; - - usb@0,7d008000 { - status = "okay"; - }; - - usb-phy@0,7d008000 { - status = "okay"; - vbus-supply = <&vdd_usb3_vbus>; - }; - backlight: backlight { compatible = "pwm-backlight";