diff mbox

[2/2] ARM: tegra: roth: enable input on mmc clock pins

Message ID 1403508779-25896-3-git-send-email-acourbot@nvidia.com
State Accepted, archived
Headers show

Commit Message

Alexandre Courbot June 23, 2014, 7:32 a.m. UTC
Input had been disabled by mistake on these pins, leading to issues with
SDIO devices like the Wifi module not being probed or random errors
occuring on the SD card.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 arch/arm/boot/dts/tegra114-roth.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Stephen Warren June 23, 2014, 7:01 p.m. UTC | #1
On 06/23/2014 01:32 AM, Alexandre Courbot wrote:
> Input had been disabled by mistake on these pins, leading to issues with
> SDIO devices like the Wifi module not being probed or random errors
> occuring on the SD card.

I thought the host controller always drove the clock, so there should be
no need for the pin's input path to be enabled. Perhaps it depends on
the transfer mode (e.g. UHS)?

If this fix is valid, perhaps Jetson TK1's sdmmc3_clk and Venice2's
sdmmc1_clk need the same fix, although we'll need to file bugs against
their pinmux spreadsheets first if that's the case.
--
To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Alexandre Courbot June 24, 2014, 5:44 a.m. UTC | #2
On 06/24/2014 04:01 AM, Stephen Warren wrote:
> On 06/23/2014 01:32 AM, Alexandre Courbot wrote:
>> Input had been disabled by mistake on these pins, leading to issues with
>> SDIO devices like the Wifi module not being probed or random errors
>> occuring on the SD card.
>
> I thought the host controller always drove the clock, so there should be
> no need for the pin's input path to be enabled. Perhaps it depends on
> the transfer mode (e.g. UHS)?

That's what I thought too, so I went against what was done downstream 
and disabled input mode. Eventually noticed various issues with MMC 
devices, reverted to the downstream settings and noticed my problems 
were solved by this single change.

>
> If this fix is valid, perhaps Jetson TK1's sdmmc3_clk and Venice2's
> sdmmc1_clk need the same fix, although we'll need to file bugs against
> their pinmux spreadsheets first if that's the case.
>

Are we having MMC issues with Jetson? I haven't noticed anything 
recently, and I have been using both eMMC and SD card.

Anyway, at least for SHIELD, this change seems to be valid.
--
To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Stephen Warren June 24, 2014, 3:53 p.m. UTC | #3
On 06/23/2014 11:44 PM, Alexandre Courbot wrote:
> On 06/24/2014 04:01 AM, Stephen Warren wrote:
>> On 06/23/2014 01:32 AM, Alexandre Courbot wrote:
>>> Input had been disabled by mistake on these pins, leading to issues with
>>> SDIO devices like the Wifi module not being probed or random errors
>>> occuring on the SD card.
>>
>> I thought the host controller always drove the clock, so there should be
>> no need for the pin's input path to be enabled. Perhaps it depends on
>> the transfer mode (e.g. UHS)?
> 
> That's what I thought too, so I went against what was done downstream
> and disabled input mode. Eventually noticed various issues with MMC
> devices, reverted to the downstream settings and noticed my problems
> were solved by this single change.

Hmm. That's odd. Can you talk to one of the HW engineers behind the
SDHCI controller and get a definitive answer. Thanks.
--
To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index a67885250f81..ba210c6e189f 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -244,7 +244,7 @@ 
 				nvidia,function = "sdmmc1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			sdmmc1_cmd_pz1 {
 				nvidia,pins = "sdmmc1_cmd_pz1",
@@ -262,7 +262,7 @@ 
 				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			sdmmc3_cmd_pa7 {
 				nvidia,pins = "sdmmc3_cmd_pa7",
@@ -290,7 +290,7 @@ 
 				nvidia,function = "sdmmc4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			sdmmc4_cmd_pt7 {
 				nvidia,pins = "sdmmc4_cmd_pt7",