From patchwork Wed Sep 18 13:07:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 275702 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E7DCC2C00F6 for ; Wed, 18 Sep 2013 22:46:44 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752313Ab3IRMqV (ORCPT ); Wed, 18 Sep 2013 08:46:21 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:15849 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751433Ab3IRMqT (ORCPT ); Wed, 18 Sep 2013 08:46:19 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Wed, 18 Sep 2013 05:45:51 -0700 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 18 Sep 2013 05:46:19 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 18 Sep 2013 05:46:19 -0700 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.298.1; Wed, 18 Sep 2013 05:46:18 -0700 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw02.nvidia.com with MailMarshal (v7,1,2,5326) id ; Wed, 18 Sep 2013 05:46:18 -0700 Received: from ldewangan-ubuntu.nvidia.com (dhcp-10-19-65-30.nvidia.com [10.19.65.30]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r8ICkA5b020138; Wed, 18 Sep 2013 05:46:16 -0700 (PDT) From: Laxman Dewangan To: CC: , , , , , , , Laxman Dewangan Subject: [PATCH V2 2/2] ARM: tegra: add palmas pincontrol to Dalmore device tree Date: Wed, 18 Sep 2013 18:37:22 +0530 Message-ID: <1379509642-19227-2-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1379509642-19227-1-git-send-email-ldewangan@nvidia.com> References: <1379509642-19227-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add Palmas pincontrol to Dalmore device tree and make following configuration as default: - Disable DVFS1 and DVFS2. - Set GPIO6 to gpio mode. Signed-off-by: Laxman Dewangan --- changes from V1: - Renames the node name to pinmux as suggested on patch V1. - Not sure that this will create the issue with other node having same name as pinmux in top of the dts file. arch/arm/boot/dts/tegra114-dalmore.dts | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 6023028..dc5cdd7 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -1011,6 +1011,19 @@ interrupt-parent = <&palmas>; interrupts = <8 0>; }; + + pinmux { + compatible = "ti,tps65913-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&palmas_default>; + + palmas_default: pinmux { + pin_gpio6 { + pins = "gpio6"; + function = "gpio"; + }; + }; + }; }; };