From patchwork Wed Jun 26 09:28:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 254655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 898E22C008E for ; Wed, 26 Jun 2013 19:29:02 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751347Ab3FZJ3C (ORCPT ); Wed, 26 Jun 2013 05:29:02 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3760 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751427Ab3FZJ3B (ORCPT ); Wed, 26 Jun 2013 05:29:01 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 26 Jun 2013 02:28:34 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 26 Jun 2013 02:26:58 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 26 Jun 2013 02:26:58 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.298.1; Wed, 26 Jun 2013 02:29:00 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Wed, 26 Jun 2013 02:29:00 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-26-134.nvidia.com [10.21.26.134]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r5Q9SmQm017123; Wed, 26 Jun 2013 02:28:59 -0700 (PDT) From: Hiroshi Doyu To: CC: , , Hiroshi Doyu Subject: [PATCH 03/23] ARM: dt: tegra30: iommu: Add "nvidia,memory-clients" Date: Wed, 26 Jun 2013 12:28:06 +0300 Message-ID: <1372238906-9346-4-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add "nvidia,memory-clients" to identify which swgroup ID a device belongs to. Signed-off-by: Hiroshi Doyu --- .../devicetree/bindings/iommu/nvidia,tegra30-smmu.txt | 11 +++++++++++ arch/arm/boot/dts/tegra30.dtsi | 19 +++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt index 6be51f6..2081e27 100644 --- a/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt @@ -11,6 +11,7 @@ Required properties: - nvidia,swgroups: A bit map of supported HardWare Accelerators(HWA). Each bit represents one sgroup. The assignments may be found in header file . +- nvidia,memory-clients: Indicates which swgroups a device belongs to. Example: iommu { @@ -23,3 +24,13 @@ Example: nvidia,swgroups = <0x00000000 0x000779ff>; nvidia,ahb = <&ahb>; }; + + host1x { + compatible = "nvidia,tegra30-host1x", "simple-bus"; + nvidia,memory-clients = ; + .... + gr3d { + compatible = "nvidia,tegra30-gr3d"; + nvidia,memory-clients = ; + .... + }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 14ec3f9..3fcee3f 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -1,5 +1,6 @@ #include #include +#include #include #include "skeleton.dtsi" @@ -22,6 +23,7 @@ interrupts = , /* syncpt */ ; /* general */ clocks = <&tegra_car TEGRA30_CLK_HOST1X>; + nvidia,memory-clients = ; #address-cells = <1>; #size-cells = <1>; @@ -33,6 +35,7 @@ reg = <0x54040000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_MPE>; + nvidia,memory-clients = ; }; vi { @@ -40,6 +43,7 @@ reg = <0x54080000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_VI>; + nvidia,memory-clients = ; }; epp { @@ -47,6 +51,7 @@ reg = <0x540c0000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_EPP>; + nvidia,memory-clients = ; }; isp { @@ -54,6 +59,7 @@ reg = <0x54100000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_ISP>; + nvidia,memory-clients = ; }; gr2d { @@ -61,6 +67,7 @@ reg = <0x54140000 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_GR2D>; + nvidia,memory-clients = ; }; gr3d { @@ -68,6 +75,7 @@ reg = <0x54180000 0x00040000>; clocks = <&tegra_car 24 &tegra_car 98>; clock-names = "3d", "3d2"; + nvidia,memory-clients = ; }; dc@54200000 { @@ -77,6 +85,7 @@ clocks = <&tegra_car TEGRA30_CLK_DISP1>, <&tegra_car TEGRA30_CLK_PLL_P>; clock-names = "disp1", "parent"; + nvidia,memory-clients = ; rgb { status = "disabled"; @@ -90,6 +99,7 @@ clocks = <&tegra_car TEGRA30_CLK_DISP2>, <&tegra_car TEGRA30_CLK_PLL_P>; clock-names = "disp2", "parent"; + nvidia,memory-clients = ; rgb { status = "disabled"; @@ -246,6 +256,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 8>; clocks = <&tegra_car TEGRA30_CLK_UARTA>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -256,6 +267,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 9>; clocks = <&tegra_car TEGRA30_CLK_UARTB>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -266,6 +278,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 10>; clocks = <&tegra_car TEGRA30_CLK_UARTC>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -276,6 +289,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 19>; clocks = <&tegra_car TEGRA30_CLK_UARTD>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -286,6 +300,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 20>; clocks = <&tegra_car TEGRA30_CLK_UARTE>; + nvidia,memory-clients = <14>; status = "disabled"; }; @@ -535,6 +550,7 @@ reg = <0x78000000 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC1>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -543,6 +559,7 @@ reg = <0x78000200 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC2>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -551,6 +568,7 @@ reg = <0x78000400 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; + nvidia,memory-clients = ; status = "disabled"; }; @@ -559,6 +577,7 @@ reg = <0x78000600 0x200>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; + nvidia,memory-clients = ; status = "disabled"; };