From patchwork Fri Jan 11 08:01:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Gaikwad X-Patchwork-Id: 211226 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 182082C01FB for ; Fri, 11 Jan 2013 19:01:41 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754546Ab3AKIBk (ORCPT ); Fri, 11 Jan 2013 03:01:40 -0500 Received: from hqemgate03.nvidia.com ([216.228.121.140]:15937 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754525Ab3AKIBj (ORCPT ); Fri, 11 Jan 2013 03:01:39 -0500 Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Fri, 11 Jan 2013 00:05:40 -0800 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Fri, 11 Jan 2013 00:01:30 -0800 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Fri, 11 Jan 2013 00:01:30 -0800 Received: from localhost.localdomain (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.279.1; Fri, 11 Jan 2013 00:01:38 -0800 From: Prashant Gaikwad To: CC: , , Prashant Gaikwad Subject: [PATCH v2 01/10] spi: tegra: Do not use clock name to get clock Date: Fri, 11 Jan 2013 13:31:20 +0530 Message-ID: <1357891289-23500-1-git-send-email-pgaikwad@nvidia.com> X-Mailer: git-send-email 1.7.4.1 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Since Tegra spi devices do not have multiple clocks, no need to use clock name to get the clock. Signed-off-by: Prashant Gaikwad Acked-by: Grant Likely --- This series depends on v4 of Tegra's ccf-rework patch series. Tested on Ventana (Tegra20) and Cardhu (Tegra30). Rebased on Tegra's for-3.9/soc and for-3.9/cleanup. Changes from V1: - Fixed clock lookup for SPI and nvec drivers. - Add clock information for nvec in device tree. --- drivers/spi/spi-tegra20-sflash.c | 2 +- drivers/spi/spi-tegra20-slink.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 02feaa5..e5dce91 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c @@ -525,7 +525,7 @@ static int tegra_sflash_probe(struct platform_device *pdev) goto exit_free_master; } - tsd->clk = devm_clk_get(&pdev->dev, "spi"); + tsd->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(tsd->clk)) { dev_err(&pdev->dev, "can not get clock\n"); ret = PTR_ERR(tsd->clk); diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index fa208a5..e255e7a 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c @@ -1191,7 +1191,7 @@ static int tegra_slink_probe(struct platform_device *pdev) goto exit_free_master; } - tspi->clk = devm_clk_get(&pdev->dev, "slink"); + tspi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(tspi->clk)) { dev_err(&pdev->dev, "can not get clock\n"); ret = PTR_ERR(tspi->clk);