From patchwork Fri Nov 30 05:44:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 202864 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 792342C0092 for ; Fri, 30 Nov 2012 16:44:55 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753193Ab2K3Foy (ORCPT ); Fri, 30 Nov 2012 00:44:54 -0500 Received: from hqemgate04.nvidia.com ([216.228.121.35]:14403 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752512Ab2K3Fox (ORCPT ); Fri, 30 Nov 2012 00:44:53 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Thu, 29 Nov 2012 21:44:14 -0800 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Thu, 29 Nov 2012 21:44:18 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 29 Nov 2012 21:44:18 -0800 Received: from hkemhub02.nvidia.com (10.18.67.13) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.279.1; Thu, 29 Nov 2012 21:44:38 -0800 Received: from markz-hp6200.nvidia.com (10.18.67.5) by hkemhub02.nvidia.com (10.18.67.13) with Microsoft SMTP Server (TLS) id 8.3.279.1; Fri, 30 Nov 2012 13:44:35 +0800 From: Mark Zhang To: , , CC: , , , Mark Zhang Subject: [PATCH] ARM: dt: tegra: cardhu: Add drm components Date: Fri, 30 Nov 2012 13:44:16 +0800 Message-ID: <1354254256-10212-1-git-send-email-markz@nvidia.com> X-Mailer: git-send-email 1.7.9.5 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch adds the RGB & HDMI nodes in Tegra 30 cardhu's dts. This makes the LVDS & HDMI working. Signed-off-by: Mark Zhang --- Changes: - This patch depcrates the patch: "[PATCH V2] ARM: dt: tegra: cardhu: Add drm components" Because the issue that LCD and HDMI can't work at the same time has been fixed by Thierry's patch: "drm: tegra: Use framebuffer pitch as line stride" arch/arm/boot/dts/tegra30-cardhu.dtsi | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index bdb2a66..9b33bfb 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -27,6 +27,25 @@ model = "NVIDIA Tegra30 Cardhu evaluation board"; compatible = "nvidia,cardhu", "nvidia,tegra30"; + host1x { + dc@54200000 { + rgb { + status = "okay"; + nvidia,ddc-i2c-bus = <&rgb_ddc>; + }; + }; + + hdmi { + status = "okay"; + + vdd-supply = <&sys_3v3_reg>; + pll-supply = <&vio_reg>; + + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + }; + }; + memory { reg = <0x80000000 0x40000000>; }; @@ -114,7 +133,7 @@ clock-frequency = <408000000>; }; - i2c@7000c000 { + rgb_ddc: i2c@7000c000 { status = "okay"; clock-frequency = <100000>; }; @@ -137,7 +156,7 @@ }; }; - i2c@7000c700 { + hdmi_ddc: i2c@7000c700 { status = "okay"; clock-frequency = <100000>; };